[Target] Prevent copying in loop variables (NFC)
/data/llvm-project/llvm/lib/Target/Lanai/LanaiISelLowering.cpp:715:19: error: loop variable '[Reg, N]' creates a copy from type 'std::pair<unsigned int, llvm::SDValue> const' [-Werror,-Wrange-loop-construct]
for (const auto [Reg, N] : RegsToPass) {
^
/data/llvm-project/llvm/lib/Target/Lanai/LanaiISelLowering.cpp:715:8: note: use reference type 'std::pair<unsigned int, llvm::SDValue> const &' to prevent copying
for (const auto [Reg, N] : RegsToPass) {
^~~~~~~~~~~~~~~~~~~~~
&
/data/llvm-project/llvm/lib/Target/Lanai/LanaiISelLowering.cpp:747:19: error: loop variable '[Reg, N]' creates a copy from type 'std::pair<unsigned int, llvm::SDValue> const' [-Werror,-Wrange-loop-construct]
for (const auto [Reg, N] : RegsToPass)
^
/data/llvm-project/llvm/lib/Target/Lanai/LanaiISelLowering.cpp:747:8: note: use reference type 'std::pair<unsigned int, llvm::SDValue> const &' to prevent copying
for (const auto [Reg, N] : RegsToPass)
^~~~~~~~~~~~~~~~~~~~~
&
2 errors generated.
This commit is contained in:
@@ -712,7 +712,7 @@ SDValue LanaiTargetLowering::LowerCCCCallTo(
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// Build a sequence of copy-to-reg nodes chained together with token chain and
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// flag operands which copy the outgoing args into registers. The InGlue in
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// necessary since all emitted instructions must be stuck together.
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for (const auto [Reg, N] : RegsToPass) {
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for (const auto &[Reg, N] : RegsToPass) {
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Chain = DAG.getCopyToReg(Chain, DL, Reg, N, InGlue);
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InGlue = Chain.getValue(1);
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}
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@@ -744,7 +744,7 @@ SDValue LanaiTargetLowering::LowerCCCCallTo(
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// Add argument registers to the end of the list so that they are
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// known live into the call.
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for (const auto [Reg, N] : RegsToPass)
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for (const auto &[Reg, N] : RegsToPass)
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Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
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if (InGlue.getNode())
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@@ -768,7 +768,7 @@ SDValue MSP430TargetLowering::LowerCCCCallTo(
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// flag operands which copy the outgoing args into registers. The InGlue in
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// necessary since all emitted instructions must be stuck together.
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SDValue InGlue;
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for (const auto [Reg, N] : RegsToPass) {
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for (const auto &[Reg, N] : RegsToPass) {
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Chain = DAG.getCopyToReg(Chain, dl, Reg, N, InGlue);
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InGlue = Chain.getValue(1);
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}
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@@ -789,7 +789,7 @@ SDValue MSP430TargetLowering::LowerCCCCallTo(
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// Add argument registers to the end of the list so that they are
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// known live into the call.
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for (const auto [Reg, N] : RegsToPass)
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for (const auto &[Reg, N] : RegsToPass)
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Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
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if (InGlue.getNode())
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@@ -738,7 +738,7 @@ SDValue VETargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
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// necessary since all emitted instructions must be stuck together in order
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// to pass the live physical registers.
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SDValue InGlue;
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for (const auto [Reg, N] : RegsToPass) {
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for (const auto &[Reg, N] : RegsToPass) {
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Chain = DAG.getCopyToReg(Chain, DL, Reg, N, InGlue);
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InGlue = Chain.getValue(1);
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}
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@@ -746,7 +746,7 @@ SDValue VETargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
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// Build the operands for the call instruction itself.
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SmallVector<SDValue, 8> Ops;
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Ops.push_back(Chain);
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for (const auto [Reg, N] : RegsToPass)
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for (const auto &[Reg, N] : RegsToPass)
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Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
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// Add a register mask operand representing the call-preserved registers.
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@@ -1064,7 +1064,7 @@ SDValue XCoreTargetLowering::LowerCCCCallTo(
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// The InGlue in necessary since all emitted instructions must be
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// stuck together.
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SDValue InGlue;
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for (const auto [Reg, N] : RegsToPass) {
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for (const auto &[Reg, N] : RegsToPass) {
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Chain = DAG.getCopyToReg(Chain, dl, Reg, N, InGlue);
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InGlue = Chain.getValue(1);
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}
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@@ -1088,7 +1088,7 @@ SDValue XCoreTargetLowering::LowerCCCCallTo(
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// Add argument registers to the end of the list so that they are
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// known live into the call.
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for (const auto [Reg, N] : RegsToPass)
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for (const auto &[Reg, N] : RegsToPass)
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Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
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if (InGlue.getNode())
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