80abbeca8e
Fix bug where the code expects just a single MI, but a series of bundled MIs need to be handled instead. The semi-formed bundled are created by SplitKit for the case where not all lanes are live (buildSingleSubRegCopy). Then the remat kicks in, and since the values that are copied in the bundle do not need to be preserved due to the remat (dead defs), all instructions in the bundle should be marked as dead. However, only the first one gets marked as dead, which causes the verifier to complain later with error: "Live range continues after dead def flag". Differential Revision: https://reviews.llvm.org/D156999
42 lines
2.7 KiB
YAML
42 lines
2.7 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn--amdpal -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs=1 -start-before=greedy,0 -stop-after=virtregrewriter,0 -stress-regalloc=5 %s -o - | FileCheck %s
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# This test checks that dead bundles are handled correctly.
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---
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name: psmain
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tracksRegLiveness: true
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machineFunctionInfo:
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stackPtrOffsetReg: '$sgpr32'
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psInputAddr: 7
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psInputEnable: 7
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $vgpr0, $vgpr1, $vgpr2
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; CHECK-LABEL: name: psmain
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; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $vgpr0, $vgpr1, $vgpr2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: dead renamable $sgpr3 = IMPLICIT_DEF
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; CHECK-NEXT: renamable $sgpr1 = KILL undef $sgpr1
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; CHECK-NEXT: renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11 = S_BUFFER_LOAD_DWORDX8_IMM undef renamable $sgpr0_sgpr1_sgpr2_sgpr3, 416, 0 :: (dereferenceable invariant load (s256), align 4)
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; CHECK-NEXT: dead [[V_CVT_U32_F32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_U32_F32_e64 0, $sgpr4, 0, 0, implicit $mode, implicit $exec
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; CHECK-NEXT: dead renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19 = IMPLICIT_DEF
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; CHECK-NEXT: renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11 = S_BUFFER_LOAD_DWORDX8_IMM undef renamable $sgpr0_sgpr1_sgpr2_sgpr3, 416, 0 :: (dereferenceable invariant load (s256), align 4)
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; CHECK-NEXT: renamable $sgpr3 = COPY killed renamable $sgpr7
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; CHECK-NEXT: renamable $sgpr5 = COPY renamable $sgpr9
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; CHECK-NEXT: dead undef %4.sub0:vreg_64 = COPY renamable $sgpr3
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; CHECK-NEXT: dead undef %7.sub1:vreg_64 = COPY killed renamable $sgpr5
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; CHECK-NEXT: dead [[IMAGE_SAMPLE_V1_V2_gfx11_:%[0-9]+]]:vgpr_32 = IMAGE_SAMPLE_V1_V2_gfx11 undef %4, undef renamable $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19, renamable $sgpr0_sgpr1_sgpr2_sgpr3, 1, 1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 8)
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; CHECK-NEXT: S_ENDPGM 0
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undef %8.sub3:sgpr_128 = IMPLICIT_DEF
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undef %8.sub1:sgpr_128 = COPY undef $sgpr1
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%346:sgpr_256 = S_BUFFER_LOAD_DWORDX8_IMM undef %8, 416, 0 :: (dereferenceable invariant load (s256), align 4)
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%60:vgpr_32 = V_CVT_U32_F32_e64 0, %346.sub0, 0, 0, implicit $mode, implicit $exec
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%127:sgpr_512 = IMPLICIT_DEF
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undef %283.sub0:vreg_64 = COPY %346.sub3
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undef %283.sub1:vreg_64 = COPY %346.sub5
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%282:vgpr_32 = IMAGE_SAMPLE_V1_V2_gfx11 undef %283, undef %127.sub8_sub9_sub10_sub11_sub12_sub13_sub14_sub15, %8, 1, 1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 8)
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S_ENDPGM 0
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...
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