Andrei Safronov 3dc09fbf29 [Xtensa] Implement THREADPTR and DFPAccel Xtensa Options. (#145543) ...

Implment base support of the TLS functionality using Xtensa THREADPTR
Option. Implement basic functionality of the DFPAccel Option(registers
support).

2025-07-02 17:47:07 +03:00

..

AArch64

[DAG] Refactor X86 combineVSelectWithAllOnesOrZeros fold into a generic DAG Combine (#145298)

2025-07-02 15:07:48 +01:00

AMDGPU

[GlobalISel] Allow expansion of urem by constant in prelegalizer (#145914)

2025-07-02 13:46:36 +01:00

ARC

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ARM

[DAG] Refactor X86 combineVSelectWithAllOnesOrZeros fold into a generic DAG Combine (#145298)

2025-07-02 15:07:48 +01:00

AVR

[PHIElimination] Reuse existing COPY in predecessor basic block (#131837)

2025-06-29 21:28:42 +03:00

BPF

[BPF] Handle nested wrapper structs in BPF map definition traversal (#144097)

2025-06-20 10:17:36 -07:00

CSKY

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DirectX

[DirectX] Implement memcpy in DXIL CBuffer Access pass (#144436)

2025-06-30 16:32:43 -07:00

Generic

[RemoveDIs] Fix rotten --implicit-check-not lines (#144711)

2025-06-24 12:32:50 +01:00

Hexagon

[Hexagon] Implement shouldConvertConstantLoadToIntImm (#146452)

2025-07-01 17:52:09 +05:30

Inputs

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Lanai

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LoongArch

[DAG] Refactor X86 combineVSelectWithAllOnesOrZeros fold into a generic DAG Combine (#145298)

2025-07-02 15:07:48 +01:00

M68k

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Mips

[DAG] Refactor X86 combineVSelectWithAllOnesOrZeros fold into a generic DAG Combine (#145298)

2025-07-02 15:07:48 +01:00

MIR

[NVPTX] Fixup v2i8 parameter and return lowering (#145585)

2025-06-27 09:26:10 -07:00

MLRegAlloc

[mlgo][regalloc] Fix after PR #131837 (#146297)

2025-06-29 18:46:02 -07:00

MSP430

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NVPTX

[DAG] visitFREEZE - always allow freezing multiple operands (#145939)

2025-07-02 11:28:37 +01:00

PowerPC

[DAG] Refactor X86 combineVSelectWithAllOnesOrZeros fold into a generic DAG Combine (#145298)

2025-07-02 15:07:48 +01:00

RISCV

[DAG] visitFREEZE - always allow freezing multiple operands (#145939)

2025-07-02 11:28:37 +01:00

SPARC

CodeGen: Emit error if getRegisterByName fails (#145194)

2025-06-23 16:33:35 +09:00

SPIRV

[SPIRV] Add FloatControl2 capability (#144371)

2025-07-02 08:48:57 -04:00

SystemZ

[SystemZ][HLASM] Emit END instruction (#146110)

2025-07-02 10:08:25 -04:00

Thumb

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Thumb2

[PHIElimination] Reuse existing COPY in predecessor basic block (#131837)

2025-06-29 21:28:42 +03:00

VE

[PHIElimination] Reuse existing COPY in predecessor basic block (#131837)

2025-06-29 21:28:42 +03:00

WebAssembly

[WebAssembly] Fix inline assembly with vector types (#146574)

2025-07-01 20:26:30 -07:00

WinCFGuard

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WinEH

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X86

[DAG] Refactor X86 combineVSelectWithAllOnesOrZeros fold into a generic DAG Combine (#145298)

2025-07-02 15:07:48 +01:00

XCore

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Xtensa

[Xtensa] Implement THREADPTR and DFPAccel Xtensa Options. (#145543)

2025-07-02 17:47:07 +03:00