Files
clang-p2996/llvm/test/CodeGen/ARM/ParallelDSP
Sam Parker 27d19101e9 [ARM][ParallelDSP] Handle squaring multiplies
The logic in ARMParallelDSP is setup to merge two 16-bits loads into
a 32-bit load and feed them into the smlads. This requires that four
loads are combined for the four inputs, but there wasn't actually a
check for this.

Differential Revision: https://reviews.llvm.org/D78492
2020-04-21 08:39:56 +01:00
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