9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
59 lines
2.1 KiB
YAML
59 lines
2.1 KiB
YAML
# This test used to crash MIRPrinter::convertStackObjects():
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# MFI can contain some dead stack objects after PEI pass, but objects storage
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# contains not dead objects only. So using objects IDs as offset in the storage
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# caused out of bounds access.
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# RUN: llc -mtriple=amdgcn -start-before=si-lower-sgpr-spills -stop-after=prologepilog -verify-machineinstrs -o - %s | FileCheck %s
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# CHECK-LABEL: name: foo
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# CHECK: {{^}}fixedStack: []
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# CHECK: stack: []
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# CHECK-LABEL: name: bar
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# CHECK: fixedStack: []
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# CHECK-NEXT: {{^}}stack:
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# CHECK-NEXT: - { id:
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---
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name: foo
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body: |
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bb.0:
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SI_RETURN
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...
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---
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name: bar
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0', virtual-reg: '' }
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- { reg: '$vgpr1', virtual-reg: '' }
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- { reg: '$vgpr2', virtual-reg: '' }
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stack:
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- { id: 0, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
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stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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machineFunctionInfo:
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scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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stackPtrOffsetReg: '$sgpr32'
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2
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renamable $vgpr41 = COPY $vgpr2, implicit $exec
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renamable $vgpr40 = COPY $vgpr1, implicit $exec
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renamable $vcc = V_CMP_NE_U32_e64 42, killed $vgpr0, implicit $exec
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$sgpr4_sgpr5 = S_AND_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
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renamable $sgpr34_sgpr35 = S_XOR_B64 $exec, killed renamable $sgpr4_sgpr5, implicit-def dead $scc
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ADJCALLSTACKUP 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
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renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @foo + 4, target-flags(amdgpu-gotprel32-hi) @foo + 12, implicit-def dead $scc
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renamable $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0
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dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr4_sgpr5, @foo, csr_amdgpu, implicit $sgpr0_sgpr1_sgpr2_sgpr3
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ADJCALLSTACKDOWN 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
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SI_RETURN
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...
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