e8e01143ec
The following code pattern:
mov %rax, %rcx
test %rax, %rax
%rax = ....
je throw_npe
mov(%rcx), %r9
mov(%rax), %r10
gets transformed into the following incorrect code after implicit null check pass:
mov %rax, %rcx
%rax = ....
faulting_load_op("movl (%rax), %r10", throw_npe)
mov(%rcx), %r9
For implicit null check pass, if the register that is checked for null value (ie, the register used in the 'test' instruction) is written into before the condition jump, we should avoid doing the optimization.
Patch by Surya Kumari Jangala!
Differential Revision: https://reviews.llvm.org/D48627
Reviewed By: skatkov
llvm-svn: 336241
50 lines
968 B
YAML
50 lines
968 B
YAML
# RUN: llc -mtriple=x86_64 -run-pass=implicit-null-checks %s -o - | FileCheck %s
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--- |
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define i32 @reg-rewrite(i32* %x) {
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entry:
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br i1 undef, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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not_null:
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ret i32 100
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}
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!0 = !{}
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...
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---
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# Check that the TEST instruction is replaced with
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# FAULTING_OP only if there are no instructions
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# between the TEST and conditional jump
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# that clobber the register used in TEST.
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name: reg-rewrite
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$rdi' }
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body: |
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bb.0.entry:
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liveins: $rdi
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TEST64rr $rdi, $rdi, implicit-def $eflags
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; CHECK-LABEL: bb.0.entry
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; CHECK-NOT: FAULTING_OP
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renamable $rdi = MOV64ri 5000
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JE_1 %bb.2, implicit $eflags
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bb.1.not_null:
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liveins: $rdi, $rsi
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$rax = MOV64rm renamable $rdi, 1, $noreg, 4, $noreg
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RETQ $eax
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bb.2.is_null:
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$eax = MOV32ri 200
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RETQ $eax
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...
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