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clang-p2996/llvm/test/CodeGen/AMDGPU/GlobalISel
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Jay Foad a1a9c53ae7 [GlobalISel] Fix infinite loop in reassociation combine 
Don't reassociate (C1+C2)+Y -> C1+(C2+Y).

Fixes https://github.com/llvm/llvm-project/issues/63849

Differential Revision: https://reviews.llvm.org/D155284
2023-07-16 14:15:24 +01:00
..
add_shl.ll
[GlobalISel] Implement commuting shl (add/or x, c1), c2 -> add/or (shl x, c2), c1 << c2
2023-05-08 22:37:43 -07:00
add.v2i16.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
add.vni16.ll
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
addo.ll
…
amdgpu-irtranslator.ll
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andn2.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
artifact-combiner-anyext.mir
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artifact-combiner-asserts.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
artifact-combiner-build-vector.mir
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artifact-combiner-concat-vectors.mir
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artifact-combiner-cse-leaves-dead-cast.mir
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artifact-combiner-extract.mir
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artifact-combiner-sext.mir
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artifact-combiner-trunc.mir
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artifact-combiner-unmerge-values.mir
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artifact-combiner-zext.mir
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ashr.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
assert-align.ll
[AMDGPU][SILowerSGPRSpills] Spill SGPRs to virtual VGPRs
2023-07-07 23:14:32 +05:30
atomic_load_local.ll
…
atomic_optimizations_mul_one.ll
[AMDGPU] Switch to the new cl option amdgpu-atomic-optimizer-strategy.
2023-06-22 07:06:42 -04:00
atomic_store_local.ll
…
atomicrmw_udec_wrap.ll
AMDGPU: Drop and upgrade llvm.amdgcn.atomic.inc/dec to atomicrmw
2023-06-21 21:20:26 -04:00
atomicrmw_uinc_wrap.ll
AMDGPU: Drop and upgrade llvm.amdgcn.atomic.inc/dec to atomicrmw
2023-06-21 21:20:26 -04:00
bool-legalization.ll
AMDGPU/GlobalISel: Widen s1 SGPR constants during regbankselect
2023-01-10 14:45:23 -05:00
br-constant-invalid-sgpr-copy.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
bswap.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
buffer-atomic-fadd.f32-no-rtn.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
buffer-atomic-fadd.f32-rtn.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
buffer-atomic-fadd.f64.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
buffer-atomic-fadd.v2f16-no-rtn.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
buffer-atomic-fadd.v2f16-rtn.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
buffer-schedule.ll
[AMDGPU] Add buffer intrinsics that take resources as pointers
2023-06-05 16:59:07 +00:00
bug-legalization-artifact-combiner-dead-def.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
bug-legalization-artifact-combiner-dead-def.mir
…
call-outgoing-stack-args.ll
[AMDGPU][SILowerSGPRSpills] Spill SGPRs to virtual VGPRs
2023-07-07 23:14:32 +05:30
clamp-fmed3-const-combine.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
clamp-minmax-const-combine.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
combine-add-nullptr.mir
…
combine-add-to-ptradd.mir
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combine-amdgpu-cvt-f32-ubyte.mir
[GlobalISel] Combine out-of-range shifts to undef.
2023-02-17 15:05:00 -08:00
combine-ashr-narrow.mir
[GlobalISel] Combine out-of-range shifts to undef.
2023-02-17 15:05:00 -08:00
combine-ext-legalizer.mir
…
combine-fabs-fneg.mir
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combine-fcanonicalize.mir
AMDGPU: Assume llvm.amdgcn.exp2 and log are canonicalizing
2023-06-15 09:55:15 -04:00
combine-fma-add-ext-fma.ll
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combine-fma-add-ext-mul.ll
…
combine-fma-add-fma-mul.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
combine-fma-add-mul-post-legalize.mir
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combine-fma-add-mul-pre-legalize.mir
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combine-fma-add-mul.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
combine-fma-sub-ext-mul.ll
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combine-fma-sub-ext-neg-mul.ll
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combine-fma-sub-mul.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
combine-fma-sub-neg-mul.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
combine-fma-unmerge-values.mir
AMDGPU: Partially fix not respecting dynamic denormal mode
2023-07-11 15:14:52 -04:00
combine-fold-binop-into-select.mir
[GlobalISel] New combine to commute constant operands to the RHS
2023-01-05 11:12:40 +00:00
combine-foldable-fneg.mir
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combine-fsh.mir
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combine-fsub-fneg.mir
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combine-itofp.mir
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combine-lshr-narrow.mir
[GlobalISel] Combine out-of-range shifts to undef.
2023-02-17 15:05:00 -08:00
combine-or-redundant.mir
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combine-redundant-and.mir
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combine-redundant-neg.mir
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combine-rot.mir
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combine-rsq.ll
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combine-rsq.mir
[AMDGPU] Remove unused check lines from GlobalISel MIR tests
2023-04-19 15:03:32 +01:00
combine-sext-inreg.mir
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combine-shift-imm-chain-illegal-types.mir
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combine-shift-imm-chain-shlsat.mir
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combine-shift-imm-chain.ll
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combine-shift-of-shifted-logic-shlsat.mir
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combine-shift-of-shifted-logic.ll
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combine-shl-from-extend-narrow.postlegal.mir
[GlobalISel] Check if ShiftAmt is greater then size of operand
2023-06-08 17:37:59 +02:00
combine-shl-from-extend-narrow.prelegal.mir
[GlobalISel] Check if ShiftAmt is greater then size of operand
2023-06-08 17:37:59 +02:00
combine-shl-narrow.mir
[GlobalISel] Combine out-of-range shifts to undef.
2023-02-17 15:05:00 -08:00
combine-short-clamp.ll
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combine-trunc-shift.mir
[GISel] Rework trunc/shl combine in a generic trunc/shift combine
2022-12-09 04:46:45 -05:00
combine-urem-pow-2.mir
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combine-zext-trunc.mir
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combiner-crash.ll
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compute-num-sign-bits-med3.mir
AMDGPU: Implement known bits functions for min3/max3/med3
2023-06-10 10:58:44 -04:00
constant-bus-restriction.ll
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crash-stack-address-O0.ll
AMDGPU: Don't run AMDGPUAttributor with -O0
2023-06-08 07:52:37 -04:00
cvt_f32_ubyte.ll
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
dereferenceable-declaration.ll
Attributes: Check declarations for dereferenceable bytes
2023-01-28 20:40:23 -04:00
divergent-control-flow.ll
…
dropped_debug_info_assert.ll
[amdgpu][nfc] Drop lds strategy noise from some tests
2023-07-11 21:18:49 +01:00
dummy-target.ll
[AMDGPU] Remove function with incompatible features
2023-02-21 10:42:39 +01:00
dynamic-alloca-divergent.ll
…
dynamic-alloca-uniform.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
extractelement-stack-lower.ll
[AMDGPU] Switch to backwards scavenging in eliminateFrameIndex
2023-06-07 20:59:05 +01:00
extractelement.i8.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
extractelement.i16.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
extractelement.i128.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
extractelement.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
fdiv.f16.ll
[AMDGPU] Use V_FMA_MIX* more often
2023-07-13 16:56:16 +02:00
fdiv.f32.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
fdiv.f64.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
flat-atomic-fadd.f32.ll
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flat-atomic-fadd.f64.ll
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flat-atomic-fadd.v2f16.ll
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flat-scratch-init.gfx.ll
[AMDGPU] Use aperture registers instead of S_GETREG
2022-11-30 12:25:10 +00:00
flat-scratch-init.ll
…
flat-scratch.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
floor.f64.ll
[AMDGPU] Remove unused check lines from GlobalISel IR tests
2023-04-19 15:13:02 +01:00
fma.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
fmax_legacy.ll
…
fmed3-min-max-const-combine.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
fmed3.ll
[AMDGPU] Handle min(max(x, y), max(min(x, y), z)) in med3 combines
2022-12-06 22:59:43 -08:00
fmin_legacy.ll
…
fmul.v2f16.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
fp64-atomics-gfx90a.ll
[AMDGPU] Add buffer intrinsics that take resources as pointers
2023-06-05 16:59:07 +00:00
fp-atomics-gfx940.ll
[AMDGPU] Do not exapnd fp atomics on gfx940
2023-02-08 13:22:04 -08:00
fpow.ll
AMDGPU: Correctly lower llvm.exp2.f32
2023-07-05 17:23:48 -04:00
frem.ll
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
fshl.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
fshr.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
function-returns.ll
…
function-returns.v2i65.ll
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global-atomic-fadd.f32-no-rtn.ll
…
global-atomic-fadd.f32-rtn.ll
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global-atomic-fadd.f64.ll
…
global-atomic-fadd.v2f16-no-rtn.ll
…
global-atomic-fadd.v2f16-rtn.ll
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global-value.illegal.ll
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global-value.ll
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hip.extern.shared.array.ll
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i1-copy.ll
…
image-waterfall-loop-O0.ll
[AMDGPU][SILowerSGPRSpills] Spill SGPRs to virtual VGPRs
2023-07-07 23:14:32 +05:30
implicit-kernarg-backend-usage-global-isel.ll
AMDGPU: Use module flag to get code object version at IR level
2023-02-02 18:57:26 -08:00
inline-asm-mismatched-size.ll
…
inline-asm.ll
…
insertelement-stack-lower.ll
AMDGPU: Fix broken attribute usage in test
2022-12-01 21:32:20 -05:00
insertelement.i8.ll
[AMDGPU] Fix VOPD dependency checks during combine
2023-06-15 11:16:33 -07:00
insertelement.i16.ll
[AMDGPU] Fix VOPD dependency checks during combine
2023-06-15 11:16:33 -07:00
insertelement.large.ll
[AMDGPU] Turn off pass to rewrite partially used virtual superregisters after RenameIndependentSubregs pass with registers of minimal size.
2023-06-07 12:05:25 +02:00
insertelement.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
inst-select-abs.mir
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
inst-select-add.mir
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
inst-select-add.s16.mir
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
inst-select-amdgcn.class.mir
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inst-select-amdgcn.class.s16.mir
[AMDGPU] Regenerate some GlobalISel checks
2023-06-05 11:21:31 +01:00
inst-select-amdgcn.cos.mir
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inst-select-amdgcn.cos.s16.mir
[AMDGPU] Regenerate some GlobalISel checks
2023-06-05 11:21:31 +01:00
inst-select-amdgcn.cvt.pk.i16.mir
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inst-select-amdgcn.cvt.pk.u16.mir
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inst-select-amdgcn.cvt.pknorm.i16.mir
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inst-select-amdgcn.cvt.pknorm.u16.mir
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inst-select-amdgcn.cvt.pkrtz.mir
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inst-select-amdgcn.ds.swizzle.mir
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inst-select-amdgcn.exp.compr.mir
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inst-select-amdgcn.exp.mir
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inst-select-amdgcn.fcmp.constants.w32.mir
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inst-select-amdgcn.fcmp.constants.w64.mir
…
inst-select-amdgcn.fmad.ftz.mir
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inst-select-amdgcn.fmed3.mir
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inst-select-amdgcn.fmed3.s16.mir
[AMDGPU] Regenerate some GlobalISel checks
2023-06-05 11:21:31 +01:00
inst-select-amdgcn.fract.mir
…
inst-select-amdgcn.fract.s16.mir
[AMDGPU] Regenerate some GlobalISel checks
2023-06-05 11:21:31 +01:00
inst-select-amdgcn.groupstaticsize.mir
…
inst-select-amdgcn.mbcnt.lo.mir
…
inst-select-amdgcn.mul.u24.mir
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inst-select-amdgcn.mulhi.i24.mir
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inst-select-amdgcn.mulhi.u24.mir
…
inst-select-amdgcn.rcp.legacy.mir
…
inst-select-amdgcn.rcp.mir
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inst-select-amdgcn.rcp.s16.mir
[AMDGPU] Regenerate some GlobalISel checks
2023-06-05 11:21:31 +01:00
inst-select-amdgcn.readfirstlane.mir
…
inst-select-amdgcn.reloc.constant.mir
…
inst-select-amdgcn.rsq.clamp.mir
…
inst-select-amdgcn.rsq.legacy.mir
…
inst-select-amdgcn.rsq.mir
…
inst-select-amdgcn.rsq.s16.mir
[AMDGPU] Regenerate some GlobalISel checks
2023-06-05 11:21:31 +01:00
inst-select-amdgcn.s.barrier.mir
…
inst-select-amdgcn.s.sendmsg.mir
…
inst-select-amdgcn.sffbh.mir
…
inst-select-amdgcn.sin.mir
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inst-select-amdgcn.sin.s16.mir
[AMDGPU] Regenerate some GlobalISel checks
2023-06-05 11:21:31 +01:00
inst-select-amdgpu-atomic-cmpxchg-flat.mir
[AMDGPU] Run update scripts on existing tests. NFC
2023-02-27 09:48:57 +01:00
inst-select-amdgpu-atomic-cmpxchg-global.mir
[AMDGPU] Run update scripts on existing tests. NFC
2023-02-27 09:48:57 +01:00
inst-select-amdgpu-ffbh-u32.mir
…
inst-select-amdgpu-ffbl-b32.mir
…
inst-select-amdgpu-wave-address.mir
…
inst-select-and.mir
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
inst-select-anyext.mir
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
inst-select-ashr.mir
…
inst-select-ashr.s16.mir
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
inst-select-ashr.v2s16.mir
[AMDGPU] Remove unused check lines from GlobalISel MIR tests
2023-04-19 15:03:32 +01:00
inst-select-atomic-cmpxchg-local.mir
…
inst-select-atomic-cmpxchg-region.mir
…
inst-select-atomicrmw-add-flat.mir
AMDGPU: Update checks for a couple of tests. NFC
2023-03-09 15:09:19 +01:00
inst-select-atomicrmw-add-global.mir
AMDGPU: Update checks for a couple of tests. NFC
2023-03-09 15:09:19 +01:00
inst-select-atomicrmw-fadd-local.mir
…
inst-select-atomicrmw-fadd-region.mir
…
inst-select-atomicrmw-xchg-local.mir
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inst-select-atomicrmw-xchg-region.mir
…
inst-select-bitcast.mir
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inst-select-bitreverse.mir
…
inst-select-br.mir
…
inst-select-brcond.mir
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
inst-select-bswap.mir
…
inst-select-build-vector-trunc.v2s16.mir
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
inst-select-build-vector.mir
…
inst-select-concat-vectors.mir
…
inst-select-constant.mir
AMDGPU/GlobalISel: Widen s1 SGPR constants during regbankselect
2023-01-10 14:45:23 -05:00
inst-select-copy.mir
…
inst-select-ctlz-zero-undef.mir
…
inst-select-ctpop.mir
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
inst-select-cttz-zero-undef.mir
…
inst-select-extract-vector-elt.mir
…
inst-select-extract.mir
[AMDGPU] 4-align SGPR triples
2023-05-26 08:06:25 +01:00
inst-select-fabs.mir
[AMDGPU] Remove unused check lines from GlobalISel MIR tests
2023-04-19 15:03:32 +01:00
inst-select-fadd.s16.mir
…
inst-select-fadd.s32.mir
…
inst-select-fadd.s64.mir
…
inst-select-fcanonicalize.mir
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inst-select-fceil.mir
…
inst-select-fceil.s16.mir
…
inst-select-fcmp.mir
…
inst-select-fcmp.s16.mir
…
inst-select-fconstant.mir
…
inst-select-fexp2.mir
AMDGPU: Correctly lower llvm.exp2.f32
2023-07-05 17:23:48 -04:00
inst-select-ffloor.s16.mir
[AMDGPU] Remove unused check lines from GlobalISel MIR tests
2023-04-19 15:03:32 +01:00
inst-select-ffloor.s32.mir
…
inst-select-ffloor.s64.mir
…
inst-select-fma.s32.mir
…
inst-select-fmad.s32.mir
…
inst-select-fmaxnum-ieee.mir
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inst-select-fmaxnum-ieee.s16.mir
…
inst-select-fmaxnum-ieee.v2s16.mir
…
inst-select-fmaxnum.mir
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inst-select-fmaxnum.s16.mir
…
inst-select-fmaxnum.v2s16.mir
…
inst-select-fminnum-ieee.mir
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inst-select-fminnum-ieee.s16.mir
…
inst-select-fminnum-ieee.v2s16.mir
…
inst-select-fminnum.mir
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inst-select-fminnum.s16.mir
…
inst-select-fminnum.v2s16.mir
…
inst-select-fmul.mir
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inst-select-fmul.v2s16.mir
…
inst-select-fneg.mir
[AMDGPU] Remove unused check lines from GlobalISel MIR tests
2023-04-19 15:03:32 +01:00
inst-select-fptosi.mir
…
inst-select-fptoui.mir
…
inst-select-fract.f64.mir
AMDGPU/GlobalISel: Fix broken test
2023-05-18 21:20:06 +01:00
inst-select-frame-index.mir
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inst-select-freeze.mir
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inst-select-frint.mir
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inst-select-frint.s16.mir
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inst-select-fshr.mir
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inst-select-i1-copy.mir
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inst-select-icmp.mir
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inst-select-icmp.s16.mir
…
inst-select-icmp.s64.mir
…
inst-select-implicit-def.mir
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inst-select-insert-vector-elt.mir
[AMDGPU][GlobalISel] Add support for S_INDIRECT_REG_WRITE_MOVREL_B32_V[9|10|11|12]
2023-03-30 18:27:49 +02:00
inst-select-insert.mir
[AMDGPU] 4-align SGPR triples
2023-05-26 08:06:25 +01:00
inst-select-intrinsic-trunc.mir
…
inst-select-intrinsic-trunc.s16.mir
…
inst-select-inttoptr.mir
…
inst-select-load-atomic-flat.mir
[AMDGPU] Autogenerate checks for several tests. NFCI
2023-02-16 10:54:34 +01:00
inst-select-load-atomic-global.mir
[AMDGPU] Autogenerate checks for several tests. NFCI
2023-02-16 10:54:34 +01:00
inst-select-load-atomic-local.mir
[AMDGPU] Autogenerate checks for several tests. NFCI
2023-02-16 10:54:34 +01:00
inst-select-load-constant.mir
[AMDGPU] Don't select _SGPR forms of SMEM instructions on GFX9+
2023-04-17 16:23:30 +01:00
inst-select-load-flat.mir
[AMDGPU] Autogenerate checks for several tests. NFCI
2023-02-16 10:54:34 +01:00
inst-select-load-global-saddr.mir
[AMDGPU] Autogenerate checks for several tests. NFCI
2023-02-16 10:54:34 +01:00
inst-select-load-global.mir
[AMDGPU] Autogenerate checks for several tests. NFCI
2023-02-16 10:54:34 +01:00
inst-select-load-global.s96.mir
…
inst-select-load-local-128.mir
[AMDGPU] Autogenerate checks for several tests. NFCI
2023-02-16 10:54:34 +01:00
inst-select-load-local.mir
[AMDGPU] Autogenerate checks for several tests. NFCI
2023-02-16 10:54:34 +01:00
inst-select-load-private.mir
Fix VGPR + offset Scratch offset folding
2023-03-09 10:52:44 +01:00
inst-select-load-smrd.mir
[AMDGPU] Don't select _SGPR forms of SMEM instructions on GFX9+
2023-04-17 16:23:30 +01:00
inst-select-lshr.mir
…
inst-select-lshr.s16.mir
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
inst-select-lshr.v2s16.mir
[AMDGPU] Remove unused check lines from GlobalISel MIR tests
2023-04-19 15:03:32 +01:00
inst-select-mad_64_32.mir
…
inst-select-merge-values.mir
…
inst-select-mul.mir
…
inst-select-or.mir
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
inst-select-pattern-add3.mir
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
inst-select-pattern-and-or.mir
…
inst-select-pattern-or3.mir
…
inst-select-pattern-smed3.mir
…
inst-select-pattern-smed3.s16.mir
…
inst-select-pattern-umed3.mir
…
inst-select-pattern-umed3.s16.mir
…
inst-select-pattern-xor3.mir
…
inst-select-phi.mir
…
inst-select-ptr-add.mir
…
inst-select-ptrmask.mir
…
inst-select-ptrtoint.mir
…
inst-select-returnaddress.mir
…
inst-select-sbfx.mir
…
inst-select-scalar-packed.xfail.mir
…
inst-select-select.mir
…
inst-select-sext-inreg.mir
…
inst-select-sext.mir
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
inst-select-sextload-local.mir
…
inst-select-shl.mir
…
inst-select-shl.s16.mir
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
inst-select-shl.v2s16.mir
[AMDGPU] Remove unused check lines from GlobalISel MIR tests
2023-04-19 15:03:32 +01:00
inst-select-sitofp.mir
…
inst-select-smax.mir
…
inst-select-smin.mir
…
inst-select-smulh.mir
…
inst-select-store-atomic-flat.mir
…
inst-select-store-atomic-local.mir
…
inst-select-store-flat.mir
[AMDGPU] Autogenerate checks for several tests. NFCI
2023-02-16 10:54:34 +01:00
inst-select-store-global.mir
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
inst-select-store-global.s96.mir
…
inst-select-store-local.mir
[AMDGPU] Autogenerate checks for several tests. NFCI
2023-02-16 10:54:34 +01:00
inst-select-store-private.mir
Fix VGPR + offset Scratch offset folding
2023-03-09 10:52:44 +01:00
inst-select-sub.mir
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
inst-select-trunc.mir
[AMDGPU] 4-align SGPR triples
2023-05-26 08:06:25 +01:00
inst-select-trunc.v2s16.mir
…
inst-select-uadde.gfx10.mir
…
inst-select-uadde.mir
…
inst-select-uaddo.mir
…
inst-select-ubfx.mir
[AMDGPU] Remove unused check lines from GlobalISel MIR tests
2023-04-19 15:03:32 +01:00
inst-select-uitofp.mir
…
inst-select-umax.mir
…
inst-select-umin.mir
…
inst-select-umulh.mir
…
inst-select-unmerge-values.mir
[AMDGPU] 4-align SGPR triples
2023-05-26 08:06:25 +01:00
inst-select-usube.gfx10.mir
…
inst-select-usube.mir
…
inst-select-usubo.mir
…
inst-select-xor.mir
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
inst-select-zext.mir
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
inst-select-zextload-local.mir
…
irtranslator-amdgcn-sendmsg.ll
…
irtranslator-amdgpu_kernel-system-sgprs.ll
AMDGPU: Don't run AMDGPUAttributor with -O0
2023-06-08 07:52:37 -04:00
irtranslator-amdgpu_kernel.ll
AMDGPU: Don't run AMDGPUAttributor with -O0
2023-06-08 07:52:37 -04:00
irtranslator-amdgpu_ps.ll
[AMDGPU] Convert some tests to opaque pointers (NFC)
2022-12-19 12:41:13 +01:00
irtranslator-amdgpu_vs.ll
…
irtranslator-assert-align.ll
AMDGPU: Created a subclass for the return address operand in the tail call return instruction
2023-04-10 10:53:33 -07:00
irtranslator-atomicrmw.ll
AMDGPU: Don't run AMDGPUAttributor with -O0
2023-06-08 07:52:37 -04:00
irtranslator-call-abi-attribute-hints.ll
Revert "enable code-object-version=5"
2022-11-29 15:21:09 -06:00
irtranslator-call-implicit-args.ll
Revert "enable code-object-version=5"
2022-11-29 15:21:09 -06:00
irtranslator-call-non-fixed.ll
…
irtranslator-call-return-values.ll
Revert "enable code-object-version=5"
2022-11-29 15:21:09 -06:00
irtranslator-call-sret.ll
Revert "enable code-object-version=5"
2022-11-29 15:21:09 -06:00
irtranslator-call.ll
Revert "enable code-object-version=5"
2022-11-29 15:21:09 -06:00
irtranslator-constant-fold-vector-op.ll
AMDGPU: Don't run AMDGPUAttributor with -O0
2023-06-08 07:52:37 -04:00
irtranslator-constantexpr.ll
[ConstExpr] Remove select constant expression
2023-03-16 10:32:08 +01:00
irtranslator-constrained-fp.ll
…
irtranslator-fast-math-flags.ll
…
irtranslator-fence.ll
…
irtranslator-fixed-function-abi-vgpr-args.ll
…
irtranslator-function-args.ll
DAG/GlobalISel: Fix broken/redundant setting of MODereferenceable
2023-01-13 20:30:30 -05:00
irtranslator-function-args.v2i65.ll
…
irtranslator-getelementptr.ll
…
irtranslator-indirect-call.ll
Revert "enable code-object-version=5"
2022-11-29 15:21:09 -06:00
irtranslator-inline-asm.ll
[amdgpu][nfc] Drop lds strategy noise from some tests
2023-07-11 21:18:49 +01:00
irtranslator-invariant.ll
…
irtranslator-memory-intrinsics.ll
…
irtranslator-metadata.ll
…
irtranslator-non-integral-address-spaces-vectors.ll
Add 'REQUIRES: asserts' to test added in D150002 (53a4adc) because it tests for a crash that is caused by an assertion failure.
2023-05-12 19:01:52 -07:00
irtranslator-non-integral-address-spaces.ll
[GlobalISel] Handle ptr size != index size in IRTranslator, CodeGenPrepare
2023-05-12 16:21:01 +00:00
irtranslator-ptrmask.ll
…
irtranslator-readnone-intrinsic-callsite.ll
…
irtranslator-sat.ll
…
irtranslator-sibling-call.ll
AMDGPU: Created a subclass for the return address operand in the tail call return instruction
2023-04-10 10:53:33 -07:00
irtranslator-struct-return-intrinsics.ll
…
irtranslator-tail-call.ll
AMDGPU: Created a subclass for the return address operand in the tail call return instruction
2023-04-10 10:53:33 -07:00
irtranslator-zext-vec-index.ll
…
lds-global-value.ll
…
lds-misaligned-bug.ll
…
lds-relocs.ll
…
lds-zero-initializer.ll
…
legalize-add.mir
…
legalize-addrspacecast.mir
AMDGPU/GlobalISel: Use ptrtoint to legalize constant 32-bit addrspacecast
2022-12-18 13:15:58 -05:00
legalize-amdgcn.if-invalid.mir
…
legalize-amdgcn.if.xfail.mir
…
legalize-amdgcn.rsq.clamp.mir
…
legalize-amdgcn.wavefrontsize.mir
…
legalize-amdgcn.workitem.id.mir
…
legalize-and.mir
…
legalize-anyext.mir
…
legalize-ashr.mir
…
legalize-atomic-cmpxchg-with-success.mir
…
legalize-atomic-cmpxchg.mir
…
legalize-atomicrmw-add.mir
…
legalize-atomicrmw-and.mir
…
legalize-atomicrmw-fadd-global.mir
…
legalize-atomicrmw-fadd-local.mir
…
legalize-atomicrmw-max.mir
…
legalize-atomicrmw-min.mir
…
legalize-atomicrmw-nand.mir
…
legalize-atomicrmw-or.mir
…
legalize-atomicrmw-sub.mir
…
legalize-atomicrmw-umax.mir
…
legalize-atomicrmw-umin.mir
…
legalize-atomicrmw-xchg-flat.mir
…
legalize-atomicrmw-xchg.mir
…
legalize-atomicrmw-xor.mir
…
legalize-bitcast.mir
…
legalize-bitreverse.mir
…
legalize-block-addr.mir
[CodeGen] Convert some tests to opaque pointers (NFC)
2023-01-05 13:21:20 +01:00
legalize-brcond.mir
…
legalize-bswap.mir
…
legalize-build-vector-splat.mir
[GlobalISel] Add G_BUILD_VECTOR[_TRUNC] to CSE
2023-01-05 10:15:31 +01:00
legalize-build-vector-trunc.mir
…
legalize-build-vector.mir
…
legalize-build-vector.s16.mir
…
legalize-concat-vectors.mir
…
legalize-constant.mir
…
legalize-ctlz-zero-undef.mir
…
legalize-ctlz.mir
…
legalize-ctpop.mir
…
legalize-cttz-zero-undef.mir
…
legalize-cttz.mir
…
legalize-extract-vector-elt.mir
…
legalize-extract.mir
…
legalize-extractelement-crash.mir
…
legalize-fabs.mir
…
legalize-fadd.mir
[AMDGPU] Remove unused check lines from GlobalISel MIR tests
2023-04-19 15:03:32 +01:00
legalize-fcanonicalize.mir
…
legalize-fceil.mir
…
legalize-fcmp.mir
…
legalize-fconstant.mir
…
legalize-fcopysign.mir
…
legalize-fcos.mir
…
legalize-fdiv.mir
AMDGPU: Always use v_rcp_f16 and v_rsq_f16
2023-07-05 16:53:01 -04:00
legalize-fexp2.mir
AMDGPU: Correctly lower llvm.exp2.f32
2023-07-05 17:23:48 -04:00
legalize-fexp.mir
AMDGPU: Correctly lower llvm.exp.f32
2023-07-05 17:23:49 -04:00
legalize-ffloor.mir
…
legalize-flog2.mir
AMDGPU: Use correct lowering for llvm.log2.f32
2023-06-23 08:37:37 -04:00
legalize-flog10.mir
AMDGPU: Correctly lower llvm.log.f32 and llvm.log10.f32
2023-07-05 15:30:35 -04:00
legalize-flog.mir
AMDGPU: Correctly lower llvm.log.f32 and llvm.log10.f32
2023-07-05 15:30:35 -04:00
legalize-fma.mir
…
legalize-fmad.s16.mir
…
legalize-fmad.s32.mir
…
legalize-fmad.s64.mir
…
legalize-fmaxnum.mir
…
legalize-fminnum.mir
…
legalize-fmul.mir
…
legalize-fneg.mir
…
legalize-fpext.mir
…
legalize-fpow.mir
AMDGPU: Correctly lower llvm.exp2.f32
2023-07-05 17:23:48 -04:00
legalize-fpowi.mir
AMDGPU: Correctly lower llvm.exp2.f32
2023-07-05 17:23:48 -04:00
legalize-fptosi.mir
…
legalize-fptoui.mir
…
legalize-fptrunc.mir
…
legalize-freeze.mir
…
legalize-frint.mir
…
legalize-fshl.mir
…
legalize-fshr.mir
…
legalize-fsin.mir
…
legalize-fsqrt.mir
…
legalize-fsub.mir
[AMDGPU] Remove unused check lines from GlobalISel MIR tests
2023-04-19 15:03:32 +01:00
legalize-icmp.mir
…
legalize-implicit-def-s1025.mir
…
legalize-implicit-def.mir
…
legalize-insert-vector-elt.mir
…
legalize-insert.mir
…
legalize-intrinsic-amdgcn-fdiv-fast.mir
…
legalize-intrinsic-round.mir
…
legalize-intrinsic-trunc.mir
…
legalize-inttoptr.mir
…
legalize-jump-table.mir
…
legalize-llvm.amdgcn.image.atomic.dim.a16.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
legalize-llvm.amdgcn.image.dim.a16.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
legalize-llvm.amdgcn.image.load.2d.d16.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
legalize-llvm.amdgcn.image.load.2d.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
legalize-llvm.amdgcn.image.load.2darraymsaa.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
legalize-llvm.amdgcn.image.load.3d.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
legalize-llvm.amdgcn.image.sample.a16.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
legalize-llvm.amdgcn.image.sample.d.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
legalize-llvm.amdgcn.image.sample.g16.a16.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
legalize-llvm.amdgcn.image.sample.g16.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
legalize-llvm.amdgcn.image.store.2d.d16.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
legalize-llvm.amdgcn.s.buffer.load.mir
…
legalize-load-constant-32bit.mir
AMDGPU/GlobalISel: Use ptrtoint to legalize constant 32-bit addrspacecast
2022-12-18 13:15:58 -05:00
legalize-load-constant.mir
…
legalize-load-flat.mir
AMDGPU: Ensure flat loads are broken into dword in functions
2023-02-05 05:25:15 -04:00
legalize-load-global.mir
…
legalize-load-local.mir
…
legalize-load-memory-metadata.mir
[CodeGen] Convert some tests to opaque pointers (NFC)
2023-01-05 13:21:20 +01:00
legalize-load-private.mir
…
legalize-lshr.mir
…
legalize-memcpy.mir
…
legalize-memcpyinline.mir
…
legalize-memmove.mir
…
legalize-memset.mir
…
legalize-merge-values-build-vector.mir
…
legalize-merge-values.mir
…
legalize-mul.mir
…
legalize-or.mir
…
legalize-phi.mir
…
legalize-ptr-add.mir
…
legalize-ptrmask.mir
…
legalize-ptrtoint.mir
…
legalize-rotl-rotr.mir
…
legalize-sadde.mir
GlobalISel: Enable CSE for G_SEXT_INREG
2023-01-15 11:38:30 -05:00
legalize-saddo.mir
…
legalize-saddsat.mir
…
legalize-sbfx.mir
[AMDGPU] Remove unused check lines from GlobalISel MIR tests
2023-04-19 15:03:32 +01:00
legalize-sdiv.mir
…
legalize-select.mir
…
legalize-sext-inreg.mir
…
legalize-sext.mir
…
legalize-sextload-constant-32bit.mir
AMDGPU/GlobalISel: Use ptrtoint to legalize constant 32-bit addrspacecast
2022-12-18 13:15:58 -05:00
legalize-sextload-flat.mir
…
legalize-sextload-global.mir
…
legalize-sextload-local.mir
…
legalize-sextload-private.mir
…
legalize-shl.mir
…
legalize-shuffle-vector.mir
…
legalize-shuffle-vector.s16.mir
…
legalize-sitofp.mir
IR: Add llvm.ldexp and llvm.experimental.constrained.ldexp intrinsics
2023-06-06 17:07:18 -04:00
legalize-smax.mir
…
legalize-smin.mir
…
legalize-smulh.mir
…
legalize-smulo.mir
…
legalize-srem.mir
…
legalize-sshlsat.mir
…
legalize-ssube.mir
GlobalISel: Enable CSE for G_SEXT_INREG
2023-01-15 11:38:30 -05:00
legalize-ssubo.mir
…
legalize-ssubsat.mir
…
legalize-store-global.mir
…
legalize-store.mir
…
legalize-strict_fsub.mir
…
legalize-sub.mir
…
legalize-trap.mir
AMDGPU: Avoid endpgm in middle of block for fallback trap lowering.
2023-06-09 21:04:38 -04:00
legalize-trunc.mir
…
legalize-uadde.mir
…
legalize-uaddo.mir
…
legalize-uaddsat.mir
…
legalize-ubfx.mir
…
legalize-udiv.mir
…
legalize-uitofp.mir
IR: Add llvm.ldexp and llvm.experimental.constrained.ldexp intrinsics
2023-06-06 17:07:18 -04:00
legalize-umax.mir
…
legalize-umin.mir
…
legalize-umulh.mir
…
legalize-umulo.mir
…
legalize-unmerge-values.mir
[AMDGPU] Add another G_UNMERGE_VALUES legalization test case
2023-02-16 16:45:35 +00:00
legalize-urem.mir
…
legalize-ushlsat.mir
…
legalize-usube.mir
…
legalize-usubo.mir
…
legalize-usubsat.mir
…
legalize-vector-args-gfx7.mir
…
legalize-vector-args-gfx8-plus.mir
…
legalize-xor.mir
…
legalize-zext.mir
…
legalize-zextload-constant-32bit.mir
AMDGPU/GlobalISel: Use ptrtoint to legalize constant 32-bit addrspacecast
2022-12-18 13:15:58 -05:00
legalize-zextload-flat.mir
…
legalize-zextload-global.mir
…
legalize-zextload-local.mir
…
legalize-zextload-private.mir
…
llvm.abs.ll
…
llvm.amdgcn.ballot.i32.ll
…
llvm.amdgcn.ballot.i64.ll
…
llvm.amdgcn.dispatch.id.ll
AMDGPU: Use module flag to get code object version at IR level
2023-02-02 18:57:26 -08:00
llvm.amdgcn.dispatch.ptr.ll
AMDGPU: Use module flag to get code object version at IR level
2023-02-02 18:57:26 -08:00
llvm.amdgcn.div.fmas.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.div.scale.ll
…
llvm.amdgcn.ds.fadd.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.ds.fmax.ll
…
llvm.amdgcn.ds.fmin.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.end.cf.i32.ll
…
llvm.amdgcn.end.cf.i64.ll
…
llvm.amdgcn.fdot2.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.fmul.legacy.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.global.atomic.csub.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.global.atomic.fadd-with-ret.ll
…
llvm.amdgcn.global.atomic.fadd.ll
…
llvm.amdgcn.if.break.i32.ll
…
llvm.amdgcn.if.break.i64.ll
…
llvm.amdgcn.image.atomic.dim.a16.ll
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
llvm.amdgcn.image.atomic.dim.ll
[AMDGPU] Reimplement the GFX11 early release VGPRs optimization
2023-06-19 17:12:54 +01:00
llvm.amdgcn.image.atomic.dim.mir
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.image.gather4.a16.dim.ll
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
llvm.amdgcn.image.gather4.dim.ll
…
llvm.amdgcn.image.gather4.o.dim.ll
[AMDGPU] Don't assert that image intrinsics are supported
2023-04-16 19:54:55 +01:00
llvm.amdgcn.image.getresinfo.a16.ll
…
llvm.amdgcn.image.getresinfo.ll
…
llvm.amdgcn.image.load.1d.d16.ll
…
llvm.amdgcn.image.load.1d.ll
…
llvm.amdgcn.image.load.2d.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.image.load.2darraymsaa.a16.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.image.load.2darraymsaa.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.image.load.3d.a16.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.image.load.3d.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.image.sample.cd.g16.ll
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
llvm.amdgcn.image.sample.g16.ll
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
llvm.amdgcn.image.store.2d.d16.ll
[AMDGPU] Remove unused check lines from tests
2023-04-19 16:15:14 +01:00
llvm.amdgcn.image.store.2d.ll
…
llvm.amdgcn.implicit.ptr.buffer.ll
[AMDGPU] Add buffer intrinsics that take resources as pointers
2023-06-05 16:59:07 +00:00
llvm.amdgcn.interp.inreg.ll
[AMDGPU] Add tests on v_interp_p*_f16 with immediate parameters.
2023-03-30 13:48:43 +01:00
llvm.amdgcn.interp.p1.f16.ll
…
llvm.amdgcn.intersect_ray.ll
[AMDGPU] Do not release VGPRs if there may be pending scratch stores
2023-06-19 21:12:43 +01:00
llvm.amdgcn.is.private.ll
[AMDGPU] Use aperture registers instead of S_GETREG
2022-11-30 12:25:10 +00:00
llvm.amdgcn.is.shared.ll
[AMDGPU] Use aperture registers instead of S_GETREG
2022-11-30 12:25:10 +00:00
llvm.amdgcn.kernarg.segment.ptr.ll
AMDGPU: Use module flag to get code object version at IR level
2023-02-02 18:57:26 -08:00
llvm.amdgcn.make.buffer.rsrc.ll
[AMDGPU] Add intrinsic for converting global pointers to resources
2023-06-05 17:07:59 +00:00
llvm.amdgcn.mfma.gfx90a.ll
…
llvm.amdgcn.mov.dpp.ll
…
llvm.amdgcn.queue.ptr.ll
AMDGPU: Use module flag to get code object version at IR level
2023-02-02 18:57:26 -08:00
llvm.amdgcn.raw.buffer.atomic.add.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.raw.buffer.atomic.fadd-with-ret.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.raw.buffer.atomic.fadd.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.raw.buffer.load.format.f16.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.raw.buffer.load.format.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.raw.buffer.load.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.raw.buffer.store.format.f16.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.raw.buffer.store.format.f32.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.raw.buffer.store.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.raw.ptr.buffer.atomic.fadd-with-ret.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.raw.ptr.buffer.load.format.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.raw.ptr.buffer.load.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.raw.ptr.buffer.store.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.raw.ptr.tbuffer.load.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.raw.ptr.tbuffer.store.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.raw.tbuffer.load.f16.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.raw.tbuffer.load.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.raw.tbuffer.store.f16.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.raw.tbuffer.store.i8.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.raw.tbuffer.store.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.rsq.clamp.ll
…
llvm.amdgcn.s.buffer.load.ll
[GlobalISel] Implement some binary reassociations, G_ADD for now
2023-06-08 21:14:58 -07:00
llvm.amdgcn.s.setreg.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.s.sleep.ll
…
llvm.amdgcn.sbfe.ll
[GlobalISel] New combine to commute constant operands to the RHS
2023-01-05 11:12:40 +00:00
llvm.amdgcn.sdot2.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.sdot4.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.sdot8.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.set.inactive.ll
AMDGPU/GlobalISel: Widen s1 SGPR constants during regbankselect
2023-01-10 14:45:23 -05:00
llvm.amdgcn.softwqm.ll
…
llvm.amdgcn.struct.buffer.atomic.add.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.struct.buffer.atomic.fadd-with-ret.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.struct.buffer.atomic.fadd.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.struct.buffer.load.format.f16.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.struct.buffer.load.format.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.struct.buffer.load.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.struct.buffer.store.format.f16.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.struct.buffer.store.format.f32.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.struct.buffer.store.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.struct.ptr.buffer.load.format.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.struct.ptr.buffer.load.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.struct.ptr.buffer.store.format.f32.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.struct.ptr.buffer.store.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.struct.ptr.tbuffer.load.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
llvm.amdgcn.struct.tbuffer.load.f16.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.struct.tbuffer.load.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
llvm.amdgcn.sudot4.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.sudot8.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.trig.preop.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.ubfe.ll
…
llvm.amdgcn.udot2.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.udot4.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.udot8.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
llvm.amdgcn.update.dpp.ll
…
llvm.amdgcn.wmma_32.ll
…
llvm.amdgcn.wmma_64.ll
…
llvm.amdgcn.workgroup.id.ll
AMDGPU: Use module flag to get code object version at IR level
2023-02-02 18:57:26 -08:00
llvm.amdgcn.workitem.id.ll
AMDGPU: Use module flag to get code object version at IR level
2023-02-02 18:57:26 -08:00
llvm.amdgcn.wqm.demote.ll
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
llvm.amdgcn.wqm.ll
…
llvm.amdgcn.writelane.ll
…
llvm.amdgcn.wwm.ll
…
llvm.memcpy.inline.ll
CodeGen: Expand memory intrinsics in PreISelIntrinsicLowering
2023-06-09 21:04:37 -04:00
llvm.memcpy.ll
CodeGen: Expand memory intrinsics in PreISelIntrinsicLowering
2023-06-09 21:04:37 -04:00
llvm.memmove.ll
Recommit "[LSR] Consider post-inc form when creating extends/truncates."
2023-06-19 17:57:06 +01:00
llvm.memset.ll
CodeGen: Expand memory intrinsics in PreISelIntrinsicLowering
2023-06-09 21:04:37 -04:00
llvm.powi.ll
AMDGPU: Correctly lower llvm.exp2.f32
2023-07-05 17:23:48 -04:00
load-constant32bit.ll
…
load-constant.96.ll
…
load-local.96.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
load-local.128.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
load-unaligned.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
localizer-wrong-insert-point.mir
…
localizer.ll
[AMDGPU][SILowerSGPRSpills] Spill SGPRs to virtual VGPRs
2023-07-07 23:14:32 +05:30
lshr.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
memory-legalizer-atomic-fence.ll
…
merge-buffer-stores.ll
[AMDGPU] Add buffer intrinsics that take resources as pointers
2023-06-05 16:59:07 +00:00
minmaxabs.ll
…
mubuf-global.ll
[AMDGPU] Switch to the new cl option amdgpu-atomic-optimizer-strategy.
2023-06-22 07:06:42 -04:00
mul-known-bits.i64.ll
[AMDGPU] Fix VOPD dependency checks during combine
2023-06-15 11:16:33 -07:00
mul-known-bits.i64.mir
[AMDGPU] Improved wide multiplies
2023-02-22 16:39:06 +01:00
mul.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
mul.v2i16.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
no-cse-nonlocal-convergent-instrs.mir
[CodeGen] Convert some tests to opaque pointers (NFC)
2023-01-05 13:21:20 +01:00
no-legalize-atomic.mir
…
non-entry-alloca.ll
Revert "enable code-object-version=5"
2022-11-29 15:21:09 -06:00
orn2.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
postlegalizer-combiner-buildvector-identities.mir
…
postlegalizer-combiner-divrem.mir
…
postlegalizer-combiner-fcanonicalize.mir
…
postlegalizer-combiner-freeze.mir
…
postlegalizer-combiner-reassoc.mir
[GlobalISel] Fix infinite loop in reassociation combine
2023-07-16 14:15:24 +01:00
postlegalizer-combiner-sextload-from-sextinreg.mir
…
postlegalizer-combiner-trunc-bitcast-buildvector.mir
[GlobalISel] New combine to commute constant operands to the RHS
2023-01-05 11:12:40 +00:00
postlegalizer-combiner-unmerge-undef.mir
…
postlegalizer-combiner-zextload-from-and.mir
…
postlegalizercombiner-and.mir
…
postlegalizercombiner-load-and-mask.mir
…
postlegalizercombiner-sbfx.mir
…
postlegalizercombiner-select.mir
…
postlegalizercombiner-ubfx.mir
…
prelegalizer-combiner-divrem.mir
…
prelegalizer-combiner-fptrunc_fpext.mir
GlobalISel: Fold out G_FPTRUNC(G_FPEXT)
2023-05-10 08:01:27 +01:00
prelegalizer-combiner-redundant-bitcast.mir
…
prelegalizer-combiner-sext_inreg-to-and.mir
…
regbankcombiner-clamp-fmed3-const.mir
AMDGPU/GlobalISel: Update test
2023-05-23 09:13:53 +01:00
regbankcombiner-clamp-minmax-const.mir
…
regbankcombiner-fmed3-minmax-const.mir
…
regbankcombiner-smed3.mir
…
regbankcombiner-umed3.mir
…
regbankselect-add.s16.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-add.s32.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-add.v2s16.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn-exp-compr.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn-exp.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn-s-buffer-load.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.ballot.i64.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.class.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.cvt.pkrtz.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.div.fmas.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.div.scale.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.ds.append.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.ds.bpermute.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.ds.consume.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.ds.gws.init.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.ds.gws.sema.v.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.ds.ordered.add.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.ds.ordered.swap.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.ds.permute.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.ds.swizzle.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.else.32.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.else.64.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.fcmp.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.fmul.legacy.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.groupstaticsize.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.icmp.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.image.load.1d.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
regbankselect-amdgcn.image.sample.1d.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
regbankselect-amdgcn.interp.mov.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.interp.p1.f16.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.interp.p1.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.interp.p2.f16.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.interp.p2.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.kernarg.segment.ptr.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.kill.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.lds.direct.load.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.lds.param.load.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.live.mask.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.mfma.gfx90a.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.mfma.gfx940.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.mfma.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.ps.live.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.raw.buffer.load.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
regbankselect-amdgcn.raw.ptr.buffer.load.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
regbankselect-amdgcn.readfirstlane.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.readlane.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.s.buffer.load.ll
[AMDGPU] Use a common check prefix in regbankselect-amdgcn.s.buffer.load.ll
2023-06-14 12:06:11 +01:00
regbankselect-amdgcn.s.buffer.load.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.s.get.waveid.in.workgroup.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.s.getpc.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.s.getreg.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.s.memrealtime.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.s.memtime.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.s.sendmsg.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.s.sendmsghalt.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.struct.buffer.load.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
regbankselect-amdgcn.struct.buffer.store.ll
Re-land "[AMDGPU] Define data layout entries for buffers""
2023-05-03 19:43:56 +00:00
regbankselect-amdgcn.struct.ptr.buffer.load.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
regbankselect-amdgcn.struct.ptr.buffer.store.ll
[AMDGPU] Use resource base for buffer instruction MachineMemOperands
2023-06-05 17:06:57 +00:00
regbankselect-amdgcn.update.dpp.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.wqm.demote.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.wqm.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.wqm.vote.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.writelane.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgcn.wwm.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgpu-ffbh-u32.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgpu-ffbl-b32.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-amdgpu-wave-address.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-and-s1.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-and.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-anyext.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-ashr.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-assert-align.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-assert-zext.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-atomic-cmpxchg.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-atomicrmw-add.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-atomicrmw-and.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-atomicrmw-fadd.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-atomicrmw-max.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-atomicrmw-min.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-atomicrmw-or.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-atomicrmw-sub.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-atomicrmw-umax.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-atomicrmw-umin.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-atomicrmw-xchg.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-atomicrmw-xor.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-bitcast.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-bitreverse.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-block-addr.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-brcond.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-bswap.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-build-vector.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-concat-vector.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-constant.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-copy.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-ctlz-zero-undef.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-ctpop.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-cttz-zero-undef.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-default.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-dyn-stackalloc.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-extract-vector-elt.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-extract.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-fabs.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-fadd.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-fcanonicalize.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-fceil.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-fcmp.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-fexp2.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-flog2.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-fma.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-fmul.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-fneg.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-fpext.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-fptosi.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-fptoui.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-fptrunc.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-frame-index.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-freeze.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-frint.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-fshr.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-fsqrt.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-fsub.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-icmp.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-icmp.s16.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-illegal-copy.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-implicit-def.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-insert-vector-elt.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-insert.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-intrinsic-trunc.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-inttoptr.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-load.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-lshr.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-mad_64_32.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-merge-values.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-mul.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-or.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-phi-s1.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-phi.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-ptr-add.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-ptrmask.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-ptrtoint.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-reg-sequence.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-sadde.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-sbfx.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-select.mir
[AMDGPU] Remove unused check lines from GlobalISel MIR tests
2023-04-19 15:03:32 +01:00
regbankselect-sext-inreg.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-sext.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-sextload.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-shl.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-sitofp.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-smax.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-smin.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-smulh.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-split-scalar-load-metadata.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-ssube.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-sub.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-trunc.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-uadde.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-uaddo.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-ubfx.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-uitofp.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-umax.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-umin.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-umulh.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-uniform-load-noclobber.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-unmerge-values.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-usube.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-usubo.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-waterfall-agpr.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-widen-scalar-loads.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-xor.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-zext.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect-zextload.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
regbankselect.mir
AMDGPU/GlobalISel: Add stub custom regbankselect pass
2023-01-30 16:18:20 -04:00
saddsat.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
sbfx.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
sdiv.i32.ll
[GlobalISel] New combine to commute constant operands to the RHS
2023-01-05 11:12:40 +00:00
sdiv.i64.ll
[AMDGPU] Improved wide multiplies
2023-02-22 16:39:06 +01:00
sdivrem.ll
Rewrite load-store-vectorizer.
2023-05-26 15:15:39 -07:00
select-to-fmin-fmax.ll
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
sext_inreg.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
shader-epilogs.ll
…
shl-ext-reduce.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
shl.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
shlN_add.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
smed3.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
smrd.ll
…
srem.i32.ll
[GlobalISel] New combine to commute constant operands to the RHS
2023-01-05 11:12:40 +00:00
srem.i64.ll
[AMDGPU] Improved wide multiplies
2023-02-22 16:39:06 +01:00
ssubsat.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
store-local.96.ll
[AMDGPU] 4-align SGPR triples
2023-05-26 08:06:25 +01:00
store-local.128.ll
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
strict_fma.f16.ll
[GlobalISelEmitter] handle operand without MVT/class
2023-04-19 07:00:57 +00:00
strict_fma.f32.ll
…
strict_fma.f64.ll
…
subo.ll
…
trunc.ll
…
uaddsat.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
ubfx.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
udiv.i32.ll
[GlobalISel] New combine to commute constant operands to the RHS
2023-01-05 11:12:40 +00:00
udiv.i64.ll
AMDGPU: Clean up LDS-related occupancy calculations
2023-01-23 21:43:06 +01:00
udivrem.ll
Rewrite load-store-vectorizer.
2023-05-26 15:15:39 -07:00
umed3.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
unsupported-load.ll
[AMDGPU] Add buffer intrinsics that take resources as pointers
2023-06-05 16:59:07 +00:00
unsupported-ptr-add.ll
[AMDGPU] Add buffer intrinsics that take resources as pointers
2023-06-05 16:59:07 +00:00
urem.i32.ll
[GlobalISel] New combine to commute constant operands to the RHS
2023-01-05 11:12:40 +00:00
urem.i64.ll
[AMDGPU] Run unmerge combines post regbankselect
2023-02-10 08:34:23 +01:00
usubsat.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
v_bfe_i32.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
widen-i8-i16-scalar-loads.ll
…
xnor.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00
zextload.ll
[AMDGPU] Do not wait for vscnt on function entry and return
2023-07-04 12:22:38 +01:00