Pengcheng Wang 01a15dca09 [RISCV] Set a barrier between mask producer and user of V0 (#114012) ...

Here we add a scheduling mutation in pre-ra scheduling, which will
add an artificial dependency edge between mask producer and its
previous nearest instruction that uses V0 register.

This prevents the overlap of live intervals of mask registers and
as a consequence we can reduce some spills/moves.

From the test changes, we can see some improvements and also some
regressions (more vtype toggles).

Partially fixes #113489.

2024-11-29 13:25:53 +08:00

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