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Simon Pilgrim e53d4869a0 [X86][AVX] combineVectorSignBitsTruncation - avoid complex vXi64->vXi32 PACKSS truncations (PR45794) 
Unless we're truncating an 'all-bits' result, using PACKSS for vXi64->vXi32 truncation causes problems with later combines as ComputeNumSignBits struggles to see through BITCASTs to smaller types. If we don't use PACKSS in these cases then we fallback to shuffles which are usually just as good.
2020-05-05 11:57:25 +01:00
..
avx512-shuffles
[X86] Enable shuffle combining for AVX512 unless the root is used by a vselect
2020-04-11 20:05:10 -07:00
GC
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GlobalISel
[SelectionDAG] Always preserve offset in MachinePointerInfo
2020-04-14 15:29:41 -07:00
3addr-16bit.ll
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3addr-or.ll
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3dnow-intrinsics.ll
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4char-promote.ll
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8bit_cmov_of_trunc_promotion.ll
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2003-08-03-CallArgLiveRanges.ll
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2003-08-23-DeadBlockTest.ll
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2003-11-03-GlobalBool.ll
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2004-02-13-FrameReturnAddress.ll
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2004-02-14-InefficientStackPointer.ll
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2004-02-22-Casts.ll
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2004-03-30-Select-Max.ll
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2004-04-13-FPCMOV-Crash.ll
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2004-06-10-StackifierCrash.ll
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2004-10-08-SelectSetCCFold.ll
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2005-01-17-CycleInDAG.ll
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2005-02-14-IllegalAssembler.ll
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2005-05-08-FPStackifierPHI.ll
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2006-01-19-ISelFoldingBug.ll
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2006-03-01-InstrSchedBug.ll
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2006-03-02-InstrSchedBug.ll
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2006-04-04-CrossBlockCrash.ll
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2006-04-27-ISelFoldingBug.ll
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2006-05-01-SchedCausingSpills.ll
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2006-05-02-InstrSched1.ll
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2006-05-02-InstrSched2.ll
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2006-05-08-CoalesceSubRegClass.ll
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2006-05-08-InstrSched.ll
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2006-05-11-InstrSched.ll
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2006-05-17-VectorArg.ll
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2006-05-22-FPSetEQ.ll
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2006-05-25-CycleInDAG.ll
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2006-07-10-InlineAsmAConstraint.ll
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2006-07-12-InlineAsmQConstraint.ll
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2006-07-20-InlineAsm.ll
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2006-07-28-AsmPrint-Long-As-Pointer.ll
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2006-07-31-SingleRegClass.ll
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2006-08-07-CycleInDAG.ll
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2006-08-16-CycleInDAG.ll
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2006-08-21-ExtraMovInst.ll
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2006-09-01-CycleInDAG.ll
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2006-10-02-BoolRetCrash.ll
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2006-10-09-CycleInDAG.ll
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2006-10-10-FindModifiedNodeSlotBug.ll
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2006-10-12-CycleInDAG.ll
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2006-10-13-CycleInDAG.ll
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2006-10-19-SwitchUnnecessaryBranching.ll
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2006-11-12-CSRetCC.ll
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2006-11-17-IllegalMove.ll
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2006-11-27-SelectLegalize.ll
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2006-12-16-InlineAsmCrash.ll
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2006-12-19-IntelSyntax.ll
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2007-01-08-InstrSched.ll
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2007-01-08-X86-64-Pointer.ll
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2007-01-13-StackPtrIndex.ll
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2007-01-29-InlineAsm-ir.ll
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2007-02-04-OrAddrMode.ll
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2007-02-16-BranchFold.ll
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2007-02-19-LiveIntervalAssert.ll
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2007-02-23-DAGCombine-Miscompile.ll
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2007-02-25-FastCCStack.ll
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2007-03-01-SpillerCrash.ll
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2007-03-15-GEP-Idx-Sink.ll
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2007-03-16-InlineAsm.ll
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2007-03-18-LiveIntervalAssert.ll
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2007-03-24-InlineAsmMultiRegConstraint.ll
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2007-03-24-InlineAsmPModifier.ll
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2007-03-24-InlineAsmVectorOp.ll
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2007-03-24-InlineAsmXConstraint.ll
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2007-03-26-CoalescerBug.ll
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2007-04-08-InlineAsmCrash.ll
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2007-04-11-InlineAsmVectorResult.ll
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2007-04-17-LiveIntervalAssert.ll
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2007-04-24-Huge-Stack.ll
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2007-04-24-VectorCrash.ll
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2007-04-27-InlineAsm-IntMemInput.ll
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2007-05-05-Personality.ll
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2007-05-05-VecCastExpand.ll
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2007-05-14-LiveIntervalAssert.ll
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2007-05-15-maskmovq.ll
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2007-05-17-ShuffleISelBug.ll
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2007-06-04-X86-64-CtorAsmBugs.ll
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2007-06-28-X86-64-isel.ll
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2007-06-29-DAGCombinerBug.ll
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2007-06-29-VecFPConstantCSEBug.ll
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2007-07-03-GR64ToVR64.ll
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2007-07-10-StackerAssert.ll
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2007-07-18-Vector-Extract.ll
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2007-08-01-LiveVariablesBug.ll
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2007-08-09-IllegalX86-64Asm.ll
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2007-08-10-SignExtSubreg.ll
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2007-09-05-InvalidAsm.ll
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2007-09-06-ExtWeakAliasee.ll
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2007-09-27-LDIntrinsics.ll
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2007-10-04-AvoidEFLAGSCopy.ll
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2007-10-12-CoalesceExtSubReg.ll
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2007-10-12-SpillerUnfold1.ll
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2007-10-12-SpillerUnfold2.ll
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2007-10-14-CoalescerCrash.ll
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2007-10-15-CoalescerCrash.ll
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2007-10-16-CoalescerCrash.ll
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2007-10-19-SpillerUnfold.ll
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2007-10-28-inlineasm-q-modifier.ll
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2007-10-29-ExtendSetCC.ll
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2007-10-30-LSRCrash.ll
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2007-10-31-extractelement-i64.ll
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2007-11-01-ISelCrash.ll
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2007-11-03-x86-64-q-constraint.ll
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2007-11-04-LiveIntervalCrash.ll
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2007-11-04-LiveVariablesBug.ll
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2007-11-04-rip-immediate-constant.ll
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2007-11-06-InstrSched.ll
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2007-11-07-MulBy4.ll
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2007-11-30-LoadFolding-Bug.ll
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2007-12-16-BURRSchedCrash.ll
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2007-12-18-LoadCSEBug.ll
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2008-01-08-IllegalCMP.ll
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2008-01-08-SchedulerCrash.ll
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2008-01-09-LongDoubleSin.ll
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2008-01-16-FPStackifierAssert.ll
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2008-01-16-InvalidDAGCombineXform.ll
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2008-02-05-ISelCrash.ll
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2008-02-06-LoadFoldingBug.ll
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2008-02-14-BitMiscompile.ll
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2008-02-18-TailMergingBug.ll
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2008-02-20-InlineAsmClobber.ll
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2008-02-22-LocalRegAllocBug.ll
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2008-02-25-InlineAsmBug.ll
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2008-02-25-X86-64-CoalescerBug.ll
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2008-02-26-AsmDirectMemOp.ll
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2008-02-27-DeadSlotElimBug.ll
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2008-02-27-PEICrash.ll
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2008-03-06-frem-fpstack.ll
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2008-03-07-APIntBug.ll
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2008-03-10-RegAllocInfLoop.ll
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2008-03-12-ThreadLocalAlias.ll
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2008-03-13-TwoAddrPassCrash.ll
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2008-03-14-SpillerCrash.ll
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2008-03-19-DAGCombinerBug.ll
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2008-03-23-DarwinAsmComments.ll
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2008-03-25-TwoAddrPassBug.ll
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2008-03-31-SpillerFoldingBug.ll
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2008-04-02-unnamedEH.ll
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2008-04-08-CoalescerCrash.ll
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2008-04-09-BranchFolding.ll
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2008-04-15-LiveVariableBug.ll
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2008-04-16-CoalescerBug.ll
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2008-04-16-ReMatBug.ll
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2008-04-17-CoalescerBug.ll
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2008-04-24-MemCpyBug.ll
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2008-04-24-pblendw-fold-crash.ll
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2008-04-26-Asm-Optimize-Imm.ll
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2008-04-28-CoalescerBug.ll
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2008-04-28-CyclicSchedUnit.ll
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2008-05-01-InvalidOrdCompare.ll
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2008-05-09-PHIElimBug.ll
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2008-05-09-ShuffleLoweringBug.ll
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2008-05-12-tailmerge-5.ll
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2008-05-21-CoalescerBug.ll
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2008-05-22-FoldUnalignedLoad.ll
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2008-05-28-CoalescerBug.ll
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2008-05-28-LocalRegAllocBug.ll
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2008-06-13-NotVolatileLoadStore.ll
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2008-06-13-VolatileLoadStore.ll
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2008-06-16-SubregsBug.ll
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2008-06-25-VecISelBug.ll
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2008-07-07-DanglingDeadInsts.ll
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2008-07-09-ELFSectionAttributes.ll
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2008-07-11-SHLBy1.ll
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2008-07-16-CoalescerCrash.ll
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2008-07-19-movups-spills.ll
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2008-07-22-CombinerCrash.ll
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2008-07-23-VSetCC.ll
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2008-08-06-CmpStride.ll
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2008-08-06-RewriterBug.ll
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2008-08-17-UComiCodeGenBug.ll
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2008-08-23-64Bit-maskmovq.ll
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2008-08-31-EH_RETURN32.ll
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2008-08-31-EH_RETURN64.ll
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2008-09-05-sinttofp-2xi32.ll
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2008-09-09-LinearScanBug.ll
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2008-09-11-CoalescerBug2.ll
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2008-09-11-CoalescerBug.ll
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2008-09-17-inline-asm-1.ll
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2008-09-18-inline-asm-2.ll
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2008-09-19-RegAllocBug.ll
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2008-09-25-sseregparm-1.ll
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2008-09-26-FrameAddrBug.ll
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2008-09-29-ReMatBug.ll
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2008-09-29-VolatileBug.ll
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2008-10-06-x87ld-nan-1.ll
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2008-10-06-x87ld-nan-2.ll
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2008-10-07-SSEISelBug.ll
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2008-10-11-CallCrash.ll
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2008-10-13-CoalescerBug.ll
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2008-10-16-VecUnaryOp.ll
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2008-10-17-Asm64bitRConstraint.ll
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2008-10-20-AsmDoubleInI32.ll
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2008-10-24-FlippedCompare.ll
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2008-10-27-CoalescerBug.ll
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2008-10-29-ExpandVAARG.ll
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2008-11-03-F80VAARG.ll
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2008-11-06-testb.ll
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2008-11-13-inlineasm-3.ll
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2008-11-29-ULT-Sign.ll
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2008-12-01-loop-iv-used-outside-loop.ll
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2008-12-01-SpillerAssert.ll
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2008-12-02-dagcombine-1.ll
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2008-12-02-dagcombine-2.ll
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2008-12-02-dagcombine-3.ll
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2008-12-02-IllegalResultType.ll
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2008-12-16-dagcombine-4.ll
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2008-12-19-EarlyClobberBug.ll
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2008-12-22-dagcombine-5.ll
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2008-12-23-crazy-address.ll
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2008-12-23-dagcombine-6.ll
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2009-01-13-DoubleUpdate.ll
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2009-01-16-SchedulerBug.ll
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2009-01-16-UIntToFP.ll
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2009-01-18-ConstantExprCrash.ll
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2009-01-25-NoSSE.ll
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2009-01-26-WrongCheck.ll
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2009-01-27-NullStrings.ll
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2009-01-31-BigShift2.ll
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2009-01-31-BigShift3.ll
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2009-01-31-BigShift.ll
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2009-02-01-LargeMask.ll
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2009-02-03-AnalyzedTwice.ll
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2009-02-04-sext-i64-gep.ll
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2009-02-08-CoalescerBug.ll
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2009-02-09-ivs-different-sizes.ll
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2009-02-11-codegenprepare-reuse.ll
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2009-02-12-DebugInfoVLA.ll
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2009-02-12-InlineAsm-nieZ-constraints.ll
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2009-02-12-SpillerBug.ll
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2009-02-21-ExtWeakInitializer.ll
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2009-02-25-CommuteBug.ll
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2009-02-26-MachineLICMBug.ll
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2009-03-03-BitcastLongDouble.ll
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2009-03-03-BTHang.ll
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2009-03-05-burr-list-crash.ll
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2009-03-09-APIntCrash.ll
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2009-03-09-SpillerBug.ll
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2009-03-10-CoalescerBug.ll
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2009-03-12-CPAlignBug.ll
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2009-03-13-PHIElimBug.ll
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2009-03-16-PHIElimInLPad.ll
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2009-03-23-LinearScanBug.ll
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2009-03-23-MultiUseSched.ll
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2009-03-25-TestBug.ll
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2009-03-26-NoImplicitFPBug.ll
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2009-04-12-FastIselOverflowCrash.ll
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2009-04-12-picrel.ll
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2009-04-13-2AddrAssert-2.ll
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2009-04-13-2AddrAssert.ll
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2009-04-14-IllegalRegs.ll
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2009-04-16-SpillerUnfold.ll
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2009-04-24.ll
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2009-04-25-CoalescerBug.ll
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2009-04-27-CoalescerAssert.ll
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2009-04-27-LiveIntervalsAssert2.ll
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2009-04-27-LiveIntervalsAssert.ll
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2009-04-29-IndirectDestOperands.ll
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2009-04-29-LinearScanBug.ll
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2009-04-29-RegAllocAssert.ll
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2009-04-scale.ll
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2009-05-08-InlineAsmIOffset.ll
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2009-05-11-tailmerge-crash.ll
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2009-05-19-SingleElementExtractElement.ll
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2009-05-23-available_externally.ll
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2009-05-23-dagcombine-shifts.ll
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2009-05-28-DAGCombineCrash.ll
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2009-05-30-ISelBug.ll
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2009-06-02-RewriterBug.ll
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2009-06-03-Win64DisableRedZone.ll
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2009-06-03-Win64SpillXMM.ll
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2009-06-04-VirtualLiveIn.ll
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2009-06-05-sitofpCrash.ll
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2009-06-05-VariableIndexInsert.ll
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2009-06-05-VZextByteShort.ll
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2009-06-06-ConcatVectors.ll
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2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
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2009-06-15-not-a-tail-call.ll
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2009-06-18-movlp-shuffle-register.ll
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2009-07-06-TwoAddrAssert.ll
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2009-07-07-SplitICmp.ll
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2009-07-09-ExtractBoolFromVector.ll
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2009-07-15-CoalescerBug.ll
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2009-07-16-CoalescerBug.ll
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2009-07-19-AsmExtraOperands.ll
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2009-07-20-CoalescerBug.ll
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2009-07-20-DAGCombineBug.ll
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2009-08-06-branchfolder-crash.ll
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2009-08-06-inlineasm.ll
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2009-08-08-CastError.ll
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2009-08-12-badswitch.ll
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2009-08-14-Win64MemoryIndirectArg.ll
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2009-08-19-LoadNarrowingMiscompile.ll
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2009-08-23-SubRegReuseUndo.ll
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2009-09-10-LoadFoldingBug.ll
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2009-09-10-SpillComments.ll
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2009-09-16-CoalescerBug.ll
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2009-09-19-earlyclobber.ll
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2009-09-21-NoSpillLoopCount.ll
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2009-09-22-CoalescerBug.ll
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2009-09-23-LiveVariablesBug.ll
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2009-10-14-LiveVariablesBug.ll
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2009-10-16-Scope.ll
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2009-10-19-atomic-cmp-eflags.ll
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2009-10-19-EmergencySpill.ll
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2009-10-25-RewriterBug.ll
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2009-11-04-SubregCoalescingBug.ll
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2009-11-13-VirtRegRewriterBug.ll
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2009-11-16-MachineLICM.ll
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2009-11-16-UnfoldMemOpBug.ll
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2009-11-17-UpdateTerminator.ll
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2009-11-18-TwoAddrKill.ll
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2009-11-25-ImpDefBug.ll
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2009-12-01-EarlyClobberBug.ll
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2009-12-11-TLSNoRedZone.ll
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2010-01-05-ZExt-Shl.ll
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2010-01-07-ISelBug.ll
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2010-01-08-Atomic64Bug.ll
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2010-01-11-ExtraPHIArg.ll
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2010-01-13-OptExtBug.ll
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2010-01-15-SelectionDAGCycle.ll
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2010-01-18-DbgValue.ll
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2010-01-19-OptExtBug.ll
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2010-02-01-DbgValueCrash.ll
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2010-02-01-TaillCallCrash.ll
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2010-02-03-DualUndef.ll
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2010-02-04-SchedulerBug.ll
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2010-02-11-NonTemporal.ll
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2010-02-12-CoalescerBug-Impdef.ll
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2010-02-15-ImplicitDefBug.ll
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2010-02-19-TailCallRetAddrBug.ll
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2010-02-23-DAGCombineBug.ll
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2010-02-23-DIV8rDefinesAX.ll
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2010-02-23-RematImplicitSubreg.ll
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2010-02-23-SingleDefPhiJoin.ll
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2010-03-04-Mul8Bug.ll
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2010-03-05-ConstantFoldCFG.ll
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2010-03-05-EFLAGS-Redef.ll
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2010-03-17-ISelBug.ll
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2010-04-06-SSEDomainFixCrash.ll
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2010-04-08-CoalescerBug.ll
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2010-04-13-AnalyzeBranchCrash.ll
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2010-04-21-CoalescerBug.ll
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2010-04-29-CoalescerCrash.ll
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2010-04-30-LocalAlloc-LandingPad.ll
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2010-05-03-CoalescerSubRegClobber.ll
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2010-05-05-LocalAllocEarlyClobber.ll
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2010-05-06-LocalInlineAsmClobber.ll
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2010-05-07-ldconvert.ll
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2010-05-10-DAGCombinerBug.ll
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2010-05-12-FastAllocKills.ll
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2010-05-16-nosseconversion.ll
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2010-05-25-DotDebugLoc.ll
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2010-05-26-DotDebugLoc.ll
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2010-05-26-FP_TO_INT-crash.ll
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2010-05-28-Crash.ll
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2010-06-01-DeadArg-DbgInfo.ll
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2010-06-09-FastAllocRegisters.ll
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2010-06-14-fast-isel-fs-load.ll
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2010-06-15-FastAllocEarlyCLobber.ll
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2010-06-24-g-constraint-crash.ll
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2010-06-25-asm-RA-crash.ll
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2010-06-25-CoalescerSubRegDefDead.ll
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2010-06-28-FastAllocTiedOperand.ll
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2010-06-28-matched-g-constraint.ll
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2010-07-02-asm-alignstack.ll
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2010-07-02-UnfoldBug.ll
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2010-07-06-asm-RIP.ll
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2010-07-06-DbgCrash.ll
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2010-07-11-FPStackLoneUse.ll
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2010-07-13-indirectXconstraint.ll
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2010-07-15-Crash.ll
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2010-07-29-SetccSimplify.ll
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2010-08-04-MaskedSignedCompare.ll
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2010-08-04-MingWCrash.ll
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2010-08-04-StackVariable.ll
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2010-09-01-RemoveCopyByCommutingDef.ll
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2010-09-16-asmcrash.ll
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2010-09-16-EmptyFilename.ll
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2010-09-17-SideEffectsInChain.ll
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2010-09-30-CMOV-JumpTable-PHI.ll
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2010-10-08-cmpxchg8b.ll
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2010-11-02-DbgParameter.ll
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2010-11-09-MOVLPS.ll
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2010-11-18-SelectOfExtload.ll
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2011-01-07-LegalizeTypesCrash.ll
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2011-01-10-DagCombineHang.ll
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2011-01-24-DbgValue-Before-Use.ll
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2011-02-04-FastRegallocNoFP.ll
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2011-02-12-shuffle.ll
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2011-02-21-VirtRegRewriter-KillSubReg.ll
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2011-02-23-UnfoldBug.ll
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2011-02-27-Fpextend.ll
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2011-03-02-DAGCombiner.ll
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2011-03-08-Sched-crash.ll
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2011-03-09-Physreg-Coalescing.ll
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2011-03-30-CreateFixedObjCrash.ll
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2011-04-13-SchedCmpJmp.ll
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2011-04-19-sclr-bb.ll
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2011-05-09-loaduse.ll
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2011-05-26-UnreachableBlockElim.ll
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2011-05-27-CrossClassCoalescing.ll
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2011-06-01-fildll.ll
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2011-06-03-x87chain.ll
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2011-06-06-fgetsign80bit.ll
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2011-06-12-FastAllocSpill.ll
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2011-06-14-mmx-inlineasm.ll
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2011-06-14-PreschedRegalias.ll
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2011-06-19-QuicksortCoalescerBug.ll
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2011-07-13-BadFrameIndexDisplacement.ll
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2011-08-23-PerformSubCombine128.ll
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2011-08-23-Trampoline.ll
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2011-08-29-BlockConstant.ll
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2011-08-29-InitOrder.ll
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2011-09-14-valcoalesce.ll
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2011-09-18-sse2cmp.ll
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2011-09-21-setcc-bug.ll
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2011-10-11-SpillDead.ll
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2011-10-11-srl.ll
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2011-10-12-MachineCSE.ll
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2011-10-18-FastISel-VectorParams.ll
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2011-10-19-LegelizeLoad.ll
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2011-10-19-widen_vselect.ll
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2011-10-21-widen-cmp.ll
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2011-10-27-tstore.ll
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2011-10-30-padd.ll
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2011-11-07-LegalizeBuildVector.ll
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2011-11-22-AVX2-Domains.ll
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2011-11-30-or.ll
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2011-12-8-bitcastintprom.ll
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2011-12-06-AVXVectorExtractCombine.ll
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2011-12-06-BitcastVectorGlobal.ll
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2011-12-08-AVXISelBugs.ll
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2011-12-15-vec_shift.ll
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2011-12-26-extractelement-duplicate-load.ll
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2011-12-28-vselecti8.ll
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2011-20-21-zext-ui2fp.ll
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2012-1-10-buildvector.ll
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2012-01-10-UndefExceptionEdge.ll
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2012-01-11-split-cv.ll
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2012-01-12-extract-sv.ll
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2012-01-16-mfence-nosse-flags.ll
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2012-01-18-vbitcast.ll
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2012-02-12-dagco.ll
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2012-02-14-scalar.ll
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2012-02-23-mmx-inlineasm.ll
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2012-02-29-CoalescerBug.ll
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2012-03-15-build_vector_wl.ll
…
2012-03-20-LargeConstantExpr.ll
…
2012-03-26-PostRALICMBug.ll
…
2012-04-09-TwoAddrPassBug.ll
…
2012-04-26-sdglue.ll
…
2012-05-17-TwoAddressBug.ll
…
2012-05-19-CoalescerCrash.ll
…
2012-07-10-extload64.ll
…
2012-07-10-shufnorm.ll
…
2012-07-15-broadcastfold.ll
…
2012-07-15-BuildVectorPromote.ll
…
2012-07-15-tconst_shl.ll
…
2012-07-15-vshl.ll
…
2012-07-16-fp2ui-i1.ll
…
2012-07-16-LeaUndef.ll
…
2012-07-17-vtrunc.ll
…
2012-07-23-select_cc.ll
…
2012-08-07-CmpISelBug.ll
…
2012-08-16-setcc.ll
…
2012-08-17-legalizer-crash.ll
…
2012-08-28-UnsafeMathCrash.ll
…
2012-09-13-dagco-fneg.ll
…
2012-09-28-CGPBug.ll
…
2012-10-02-DAGCycle.ll
…
2012-10-03-DAGCycle.ll
…
2012-10-18-crash-dagco.ll
…
2012-11-28-merge-store-alias.ll
…
2012-12-1-merge-multiple.ll
…
2012-12-12-DAGCombineCrash.ll
…
2012-12-14-v8fp80-crash.ll
…
2012-12-19-NoImplicitFloat.ll
…
2013-01-09-DAGCombineBug.ll
…
2013-03-13-VEX-DestReg.ll
…
2013-05-06-ConactVectorCrash.ll
…
2013-10-14-FastISel-incorrect-vreg.ll
…
2014-05-29-factorial.ll
…
2014-08-29-CompactUnwind.ll
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
9601.ll
…
20090313-signext.ll
…
abi-isel.ll
…
absolute-bit-mask-fastisel.ll
…
absolute-bit-mask.ll
…
absolute-bt.ll
…
absolute-cmp.ll
…
absolute-constant.ll
…
absolute-rotate.ll
…
add32ri8.ll
…
add_shl_constant.ll
…
add-ext.ll
…
add-i64.ll
…
add-of-carry.ll
…
add-sub-nsw-nuw.ll
…
add.ll
…
addcarry2.ll
…
addcarry.ll
…
addr-label-difference.ll
…
addr-mode-matcher-2.ll
…
addr-mode-matcher.ll
…
addr-of-ret-addr.ll
…
address-type-promotion-constantexpr.ll
…
addrsig.ll
…
addsub-constant-folding.ll
…
adx-commute.mir
…
adx-intrinsics-upgrade.ll
…
adx-intrinsics.ll
…
aes_intrinsics.ll
…
alias-gep.ll
…
alias-static-alloca.ll
…
aliases.ll
…
align-branch-boundary-default.ll
…
align-branch-boundary-noautopadding.ll
…
align-branch-boundary-suppressions-tls.ll
…
align-branch-boundary-suppressions.ll
Use 15 byte long nops on modern Intel processors
2020-03-13 10:51:09 -07:00
align-down-const.ll
…
align-down.ll
…
aligned-comm.ll
…
aligned-variadic.ll
…
alignment-2.ll
…
alignment.ll
…
all-ones-vector.ll
…
alldiv-divdi3.ll
…
alloca-align-rounding-32.ll
…
alloca-align-rounding.ll
…
alloca-overaligned.ll
…
allrem-moddi3.ll
…
and-encoding.ll
…
and-load-fold.ll
…
and-or-fold.ll
…
and-sink.ll
…
and-su.ll
…
andimm8.ll
…
anyext.ll
…
anyregcc-crash.ll
…
anyregcc.ll
…
apm.ll
…
AppendingLinkage.ll
…
arg_returned_bitcast.ll
…
arg-cast.ll
…
arg-copy-elide-win64.ll
…
arg-copy-elide.ll
…
asm-block-labels.ll
…
asm-global-imm.ll
…
asm-indirect-mem.ll
…
asm-invalid-register-class-crasher.ll
…
asm-label2.ll
…
asm-label.ll
…
asm-mismatched-types.ll
…
asm-modifier2.ll
[tests] Speculative fix for buildbot breakage from c5f7c039ef
2020-04-30 22:04:53 -04:00
asm-modifier-P.ll
…
asm-modifier.ll
[tests] Revert unhelpful change from d73eed42d1
2020-04-30 22:18:54 -04:00
asm-reg-type-mismatch-avx512.ll
…
asm-reg-type-mismatch.ll
…
asm-reject-reg-type-mismatch.ll
…
asm-reject-rex.ll
…
asm-reject-vk32-vk64.ll
…
asm-reject-xmm16.ll
…
atom-call-reg-indirect-foldedreload32.ll
…
atom-call-reg-indirect-foldedreload64.ll
…
atom-call-reg-indirect.ll
…
atom-cmpb.ll
…
atom-fixup-lea1.ll
…
atom-fixup-lea2.ll
…
atom-fixup-lea3.ll
…
atom-fixup-lea4.ll
…
atom-lea-addw-bug.ll
…
atom-lea-sp.ll
…
atom-pad-short-functions.ll
…
atom-sched.ll
…
atom-shuf.ll
…
atomic8.ll
…
atomic16.ll
…
atomic32.ll
…
atomic64.ll
…
atomic128.ll
…
atomic6432.ll
…
atomic-add.ll
…
atomic-dagsched.ll
…
atomic-eflags-reuse.ll
…
atomic-flags.ll
…
atomic-fp.ll
[X86] Enable the use of movlps for i64 atomic load on 32-bit targets with sse1.
2020-02-23 15:11:38 -08:00
atomic-idempotent.ll
[X86] X86CallFrameOptimization - generalize slow push code path
2020-03-29 11:01:59 +01:00
atomic-load-store-wide.ll
[X86] Use FIST for i64 atomic stores on 32-bit targets without SSE.
2020-02-23 15:11:38 -08:00
atomic-load-store.ll
…
atomic-mi.ll
[X86] Use FIST for i64 atomic stores on 32-bit targets without SSE.
2020-02-23 15:11:38 -08:00
atomic-minmax-i6432.ll
…
atomic-monotonic.ll
…
atomic-non-integer-fp128.ll
…
atomic-non-integer.ll
[X86] Enable the use of movlps for i64 atomic load on 32-bit targets with sse1.
2020-02-23 15:11:38 -08:00
atomic-op.ll
…
atomic-ops-ancient-64.ll
…
atomic-or.ll
…
atomic-pointer.ll
…
atomic-unordered.ll
…
atomicf128.ll
…
Atomics-64.ll
…
attribute-sections.ll
…
avg-mask.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
avg.ll
[DAG] SimplifyDemandedVectorElts - add EXTRACT_SUBVECTOR SimplifyMultipleUseDemandedBits handling
2020-05-01 13:48:07 +01:00
avoid_complex_am.ll
…
avoid-lea-scale2.ll
…
avoid-loop-align-2.ll
…
avoid-loop-align.ll
…
avoid-sfb-g-no-change2.mir
…
avoid-sfb-g-no-change3.mir
…
avoid-sfb-g-no-change.mir
…
avoid-sfb-kill-flags.mir
…
avoid-sfb-offset.mir
…
avoid-sfb-overlaps.ll
…
avoid-sfb.ll
…
avx1-logical-load-folding.ll
…
avx2-arith.ll
…
avx2-cmp.ll
…
avx2-conversions.ll
…
avx2-fma-fneg-combine.ll
…
avx2-gather.ll
…
avx2-intrinsics-canonical.ll
…
avx2-intrinsics-fast-isel.ll
…
avx2-intrinsics-x86-upgrade.ll
…
avx2-intrinsics-x86.ll
…
avx2-logic.ll
…
avx2-masked-gather.ll
…
avx2-nontemporal.ll
…
avx2-phaddsub.ll
…
avx2-pmovxrm.ll
…
avx2-shift.ll
…
avx2-vbroadcast.ll
…
avx2-vbroadcasti128.ll
…
avx2-vector-shifts.ll
…
avx2-vperm.ll
…
avx512-adc-sbb.ll
…
avx512-any_extend_load.ll
…
avx512-arith.ll
…
avx512-broadcast-unfold.ll
…
avx512-bugfix-23634.ll
…
avx512-bugfix-25270.ll
…
avx512-bugfix-26264.ll
…
avx512-build-vector.ll
…
avx512-calling-conv.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
avx512-cmp-kor-sequence.ll
…
avx512-cmp-mask.ll
…
avx512-cmp.ll
…
avx512-cvt.ll
[X86] Enable shuffle combining for AVX512 unless the root is used by a vselect
2020-04-11 20:05:10 -07:00
avx512-cvttp2i.ll
…
avx512-ext.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
avx512-extract-subvector-load-store.ll
[SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad
2020-05-02 15:18:10 -07:00
avx512-extract-subvector.ll
…
avx512-fma-commute.ll
…
avx512-fma-intrinsics-upgrade.ll
[X86] Print k-mask in FMA3 comments.
2020-04-12 13:16:53 -07:00
avx512-fma-intrinsics.ll
[X86] Print k-mask in FMA3 comments.
2020-04-12 13:16:53 -07:00
avx512-fma.ll
[X86] Print k-mask in FMA3 comments.
2020-04-12 13:16:53 -07:00
avx512-fsel.ll
…
avx512-gather-scatter-intrin-deprecated.ll
…
avx512-gather-scatter-intrin.ll
…
avx512-gfni-intrinsics.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512-hadd-hsub.ll
…
avx512-i1test.ll
…
avx512-inc-dec.ll
…
avx512-insert-extract_i1.ll
…
avx512-insert-extract.ll
[DAG] SimplifyDemandedVectorElts - add EXTRACT_SUBVECTOR SimplifyMultipleUseDemandedBits handling
2020-05-01 13:48:07 +01:00
avx512-intel-ocl.ll
[x86] Fix Intel OpenCL builtin CalleeSavedRegs on skx
2020-04-03 11:27:40 +08:00
avx512-intrinsics-canonical.ll
[X86] Print k-mask in FMA3 comments.
2020-04-12 13:16:53 -07:00
avx512-intrinsics-fast-isel.ll
[X86] Print k-mask in FMA3 comments.
2020-04-12 13:16:53 -07:00
avx512-intrinsics-upgrade.ll
[X86] Print k-mask in FMA3 comments.
2020-04-12 13:16:53 -07:00
avx512-intrinsics-x86_64.ll
…
avx512-intrinsics.ll
[X86] Print k-mask in FMA3 comments.
2020-04-12 13:16:53 -07:00
avx512-load-store.ll
…
avx512-load-trunc-store-i1.ll
…
avx512-logic.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
avx512-mask-op.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
avx512-mask-spills.ll
…
avx512-mask-zext-bugfix.ll
…
avx512-masked_memop-16-8.ll
…
avx512-masked-memop-64-32.ll
…
avx512-memfold.ll
[X86] Print k-mask in FMA3 comments.
2020-04-12 13:16:53 -07:00
avx512-mov.ll
…
avx512-nontemporal.ll
…
avx512-pmovxrm.ll
…
avx512-regcall-Mask.ll
[X86] Convert vXi1 vectors to xmm/ymm/zmm types via getRegisterTypeForCallingConv rather than using CCPromoteToType in the td file
2020-03-04 15:02:32 -08:00
avx512-regcall-NoMask.ll
…
avx512-rndscale.ll
…
avx512-rotate.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512-scalar_mask.ll
[X86] Print k-mask in FMA3 comments.
2020-04-12 13:16:53 -07:00
avx512-scalar.ll
…
avx512-scalarIntrinsics.ll
…
avx512-select.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
avx512-shift.ll
…
avx512-skx-insert-subvec.ll
…
avx512-trunc.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
avx512-unsafe-fp-math.ll
…
avx512-vbroadcast.ll
…
avx512-vbroadcasti128.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
avx512-vbroadcasti256.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
avx512-vec3-crash.ll
[X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0)
2020-03-13 18:43:04 +00:00
avx512-vec-cmp.ll
[X86][SSE] Canonicalize UNARYSHUFFLE(XOR(X,-1) -> XOR(UNARYSHUFFLE(X),-1)
2020-04-30 19:18:51 +01:00
avx512-vpclmulqdq.ll
…
avx512-vpermv3-commute.ll
…
avx512-vpternlog-commute.ll
…
avx512-vselect-crash.ll
…
avx512-vselect.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
avx512bf16-intrinsics.ll
…
avx512bf16-vl-intrinsics.ll
…
avx512bw-arith.ll
…
avx512bw-intrinsics-canonical.ll
…
avx512bw-intrinsics-fast-isel.ll
…
avx512bw-intrinsics-upgrade.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512bw-intrinsics.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512bw-mask-op.ll
…
avx512bw-mov.ll
…
avx512bw-vec-cmp.ll
…
avx512bw-vec-test-testn.ll
…
avx512bwvl-arith.ll
…
avx512bwvl-intrinsics-canonical.ll
…
avx512bwvl-intrinsics-fast-isel.ll
[X86][AVX] Combine shuffles to TRUNCATE/VTRUNC patterns
2020-03-25 17:41:51 +00:00
avx512bwvl-intrinsics-upgrade.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512bwvl-intrinsics.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512bwvl-mov.ll
…
avx512bwvl-vec-cmp.ll
…
avx512bwvl-vec-test-testn.ll
…
avx512cd-intrinsics-fast-isel.ll
…
avx512cd-intrinsics-upgrade.ll
…
avx512cd-intrinsics.ll
…
avx512cdvl-intrinsics-upgrade.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512cdvl-intrinsics.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512dq-intrinsics-fast-isel.ll
…
avx512dq-intrinsics-upgrade.ll
[X86] Split masked instruction tests to enable D60940.
2020-03-24 23:44:16 -07:00
avx512dq-intrinsics.ll
[X86] Update more intrinsic tests to prepare to extend D60940 to scalar fp.
2020-03-25 23:03:20 -07:00
avx512dq-mask-op.ll
…
avx512dqvl-intrinsics-fast-isel.ll
…
avx512dqvl-intrinsics-upgrade.ll
[X86] Split masked instruction tests to enable D60940.
2020-03-24 23:44:16 -07:00
avx512dqvl-intrinsics.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512er-intrinsics.ll
…
avx512f-256-set0.mir
…
avx512f-vec-test-testn.ll
…
avx512ifma-intrinsics-fast-isel.ll
…
avx512ifma-intrinsics-upgrade.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512ifma-intrinsics.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512ifmavl-intrinsics-fast-isel.ll
…
avx512ifmavl-intrinsics-upgrade.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512ifmavl-intrinsics.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512vbmi2-funnel-shifts.ll
[DAG] MatchRotate - Add funnel shift by immediate support
2020-03-11 18:55:18 +00:00
avx512vbmi2-intrinsics-fast-isel.ll
…
avx512vbmi2-intrinsics-upgrade.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512vbmi2-intrinsics.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512vbmi2vl-funnel-shifts.ll
[DAG] MatchRotate - Add funnel shift by immediate support
2020-03-11 18:55:18 +00:00
avx512vbmi2vl-intrinsics-fast-isel.ll
…
avx512vbmi2vl-intrinsics-upgrade.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512vbmi2vl-intrinsics.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512vbmi-intrinsics-fast-isel.ll
…
avx512vbmi-intrinsics-upgrade.ll
[X86] Split masked instruction tests to enable D60940.
2020-03-24 23:44:16 -07:00
avx512vbmi-intrinsics.ll
[X86] Split masked instruction tests to enable D60940.
2020-03-24 23:44:16 -07:00
avx512vbmivl-intrinsics-fast-isel.ll
…
avx512vbmivl-intrinsics-upgrade.ll
[X86] Split masked instruction tests to enable D60940.
2020-03-24 23:44:16 -07:00
avx512vbmivl-intrinsics.ll
[X86] Split masked instruction tests to enable D60940.
2020-03-24 23:44:16 -07:00
avx512vl_vnni-intrinsics-upgrade.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512vl_vnni-intrinsics.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512vl-arith.ll
…
avx512vl-intrinsics-canonical.ll
[X86] Print k-mask in FMA3 comments.
2020-04-12 13:16:53 -07:00
avx512vl-intrinsics-fast-isel.ll
[X86] Print k-mask in FMA3 comments.
2020-04-12 13:16:53 -07:00
avx512vl-intrinsics-upgrade.ll
[X86] Print k-mask in FMA3 comments.
2020-04-12 13:16:53 -07:00
avx512vl-intrinsics.ll
[X86] Print k-mask in FMA3 comments.
2020-04-12 13:16:53 -07:00
avx512vl-logic.ll
…
avx512vl-mov.ll
…
avx512vl-nontemporal.ll
…
avx512vl-vbroadcast.ll
…
avx512vl-vec-cmp.ll
…
avx512vl-vec-masked-cmp.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
avx512vl-vec-test-testn.ll
…
avx512vl-vpclmulqdq.ll
…
avx512vlcd-intrinsics-fast-isel.ll
…
avx512vlvp2intersect-intrinsics.ll
…
avx512vnni-intrinsics-upgrade.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512vnni-intrinsics.ll
[X86] Split more masked instruction tests to enable D60940.
2020-03-25 21:18:27 -07:00
avx512vnni.ll
…
avx512vp2intersect-intrinsics.ll
…
avx512vpopcntdq-intrinsics.ll
…
avx-arith.ll
…
avx-basic.ll
…
avx-bitcast.ll
…
avx-brcond.ll
…
avx-cast.ll
…
avx-cmp.ll
…
avx-cvt-2.ll
…
avx-cvt-3.ll
[DAG] SimplifyDemandedVectorElts - add EXTRACT_SUBVECTOR SimplifyMultipleUseDemandedBits handling
2020-05-01 13:48:07 +01:00
avx-cvt.ll
…
avx-cvttp2si.ll
…
avx-fp2int.ll
[X86][SSE] lowerShuffleWithPACK - extend to use chained PACKs for larger truncations
2020-04-03 18:26:10 +01:00
avx-gfni-intrinsics.ll
…
avx-insertelt.ll
…
avx-intel-ocl.ll
…
avx-intrinsics-fast-isel.ll
[x86] allow peeking through an extract_subvector to find a splatted operand
2020-02-20 13:59:59 -05:00
avx-intrinsics-x86_64.ll
…
avx-intrinsics-x86-upgrade.ll
[X86] Enable shuffle combining for AVX512 unless the root is used by a vselect
2020-04-11 20:05:10 -07:00
avx-intrinsics-x86.ll
…
avx-isa-check.ll
…
avx-load-store.ll
…
avx-logic.ll
…
avx-minmax.ll
…
avx-select.ll
…
avx-shift.ll
[x86] add test for shift+op+concat; NFC
2020-05-04 17:31:45 -04:00
avx-shuffle-x86_32.ll
…
avx-splat.ll
[x86] allow peeking through an extract_subvector to find a splatted operand
2020-02-20 13:59:59 -05:00
avx-trunc.ll
…
avx-unpack.ll
…
avx-varargs-x86_64.ll
…
avx-vbroadcast.ll
…
avx-vbroadcastf128.ll
…
avx-vextractf128.ll
…
avx-vinsertf128.ll
…
avx-vpclmulqdq.ll
…
avx-vperm2x128.ll
[X86][AVX] Combine 128-bit lane shuffles with a zeroable upper half to EXTRACT_SUBVECTOR (PR40720)
2020-03-29 16:41:59 +01:00
avx-vzeroupper.ll
[llvm] Fix missing FileCheck directive colons
2020-04-06 09:59:08 -06:00
avx-win64-args.ll
…
avx-win64.ll
…
avx.ll
…
backpropmask.ll
…
bad-tls-fold.mir
…
barrier-sse.ll
…
barrier.ll
…
base-pointer-and-cmpxchg.ll
…
basic-promote-integers.ll
…
basicblock-sections-clusters-branches.ll
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
basicblock-sections-clusters-eh.ll
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
basicblock-sections-clusters-error.ll
Extend BasicBlock sections to allow specifying clusters of basic blocks in the same section.
2020-04-13 12:19:59 -07:00
basicblock-sections-clusters.ll
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
basicblock-sections-cold.ll
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
basicblock-sections-directjumps.ll
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
basicblock-sections-eh.ll
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
basicblock-sections-labels.ll
Basic Block Sections support in LLVM.
2020-03-16 16:06:54 -07:00
basicblock-sections-list.ll
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
basicblock-sections-listbb.ll
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
basicblock-sections-mir-parse.mir
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
basicblock-sections-mir-print.ll
Extend BasicBlock sections to allow specifying clusters of basic blocks in the same section.
2020-04-13 12:19:59 -07:00
basicblock-sections.ll
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
bb_rotate.ll
…
bc-extract.ll
…
bigstructret2.ll
…
bigstructret.ll
…
bit-piece-comment.ll
…
bit-test-shift.ll
…
bitcast2.ll
…
bitcast-and-setcc-128.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
bitcast-and-setcc-256.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
bitcast-and-setcc-512.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
bitcast-i256.ll
…
bitcast-int-to-vector-bool-sext.ll
[X86] Teach combineToExtendBoolVectorInReg to create opportunities for using broadcast load instructions.
2020-03-09 11:26:12 -07:00
bitcast-int-to-vector-bool-zext.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
bitcast-int-to-vector-bool.ll
[X86] Teach combineToExtendBoolVectorInReg to create opportunities for using broadcast load instructions.
2020-03-09 11:26:12 -07:00
bitcast-int-to-vector.ll
…
bitcast-mmx.ll
…
bitcast-setcc-128.ll
…
bitcast-setcc-256.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
bitcast-setcc-512.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
bitcast-vector-bool.ll
[SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad
2020-05-02 15:18:10 -07:00
bitcast.ll
…
bitcnt-false-dep.ll
…
bitreverse.ll
…
block-placement.ll
Revert "Include static prof data when collecting loop BBs"
2020-03-24 09:41:16 -07:00
block-placement.mir
…
bmi2-x86_64.ll
…
bmi2.ll
…
bmi-intrinsics-fast-isel-x86_64.ll
…
bmi-intrinsics-fast-isel.ll
…
bmi-x86_64.ll
…
bmi.ll
…
bool-ext-inc.ll
…
bool-math.ll
…
bool-simplify.ll
…
bool-vector.ll
…
bool-zext.ll
…
br-fold.ll
…
branchfolding-catchpads.ll
…
branchfolding-debug-invariant.mir
…
branchfolding-debugloc.ll
…
branchfolding-landingpads.ll
…
branchfolding-undef.mir
…
brcond.ll
…
break-anti-dependencies.ll
…
break-false-dep.ll
…
broadcast-elm-cross-splat-vec.ll
[TargetLowering] SimplifyDemandedVectorElts - add DemandedElts mask to ISD::BITCAST SimplifyDemandedBits call.
2020-03-10 13:39:10 +00:00
broadcastm-lowering.ll
…
bss_pagealigned.ll
…
bswap_tree2.ll
…
bswap_tree.ll
…
bswap-inline-asm.ll
…
bswap-rotate.ll
…
bswap-vector.ll
…
bswap-wide-int.ll
…
bswap.ll
…
bt.ll
…
btc_bts_btr.ll
…
btq.ll
…
bug26810.ll
…
bug37521.ll
…
build-vector-128.ll
…
build-vector-256.ll
…
build-vector-512.ll
…
buildvec-extract.ll
[X86][SSE] getFauxShuffle - support insert(truncate/extend(extract(vec0,c0)),vec1,c1) shuffle patterns at the byte level
2020-04-26 15:31:01 +01:00
buildvec-insertvec.ll
[X86][SSE] getFauxShuffle - support insert(truncate/extend(extract(vec0,c0)),vec1,c1) shuffle patterns at the byte level
2020-04-26 15:31:01 +01:00
bypass-slow-division-32.ll
…
bypass-slow-division-64.ll
…
bypass-slow-division-tune.ll
[x86] Enable bypassing 64-bit division on generic x86-64
2020-04-29 16:55:48 +01:00
byval2.ll
…
byval3.ll
…
byval4.ll
…
byval5.ll
…
byval6.ll
…
byval7.ll
…
byval-align.ll
…
byval-callee-cleanup.ll
…
byval.ll
…
cache-intrinsic.ll
…
call-imm.ll
…
call-push.ll
…
call-site-info-output.ll
Reland D73534: [DebugInfo] Enable the debug entry values feature by default
2020-03-19 13:57:30 +01:00
callbr-asm-bb-exports.ll
…
callbr-asm-blockplacement.ll
…
callbr-asm-branch-folding.ll
Specify branch probabilities for callbr dests
2020-03-11 20:33:48 -07:00
callbr-asm-destinations.ll
…
callbr-asm-errors.ll
…
callbr-asm-label-addr.ll
…
callbr-asm-obj-file.ll
[X86InstPrinter] Change printPCRelImm to print the target address in hexadecimal form
2020-03-26 08:28:59 -07:00
callbr-asm-outputs-pred-succ.ll
[SelectionDAG] fix predecessor list for INLINEASM_BRs' parent
2020-04-06 13:46:39 -07:00
callbr-asm-outputs.ll
[SelectionDAG] fix predecessor list for INLINEASM_BRs' parent
2020-04-06 13:46:39 -07:00
callbr-asm.ll
Specify branch probabilities for callbr dests
2020-03-11 20:33:48 -07:00
callbr-codegenprepare.ll
Change callbr to only define its output SSA variable on the normal
2020-04-23 19:36:44 -04:00
cas.ll
…
cast-vsel.ll
[X86][SSE] lowerV8I16Shuffle - lower compaction shuffles using PACKUSDW(PBLENDW,PBLENDW) on SSE41+
2020-04-04 13:08:25 +01:00
catch.ll
…
catchpad-dynamic-alloca.ll
…
catchpad-lifetime.ll
…
catchpad-realign-savexmm.ll
…
catchpad-regmask.ll
…
catchpad-reuse.ll
…
catchpad-weight.ll
…
catchret-empty-fallthrough.ll
…
catchret-fallthrough.ll
…
catchret-regmask.ll
…
cfguard-checks.ll
…
cfguard-module-flag.ll
…
cfguard-x86-64-vectorcall.ll
…
cfguard-x86-vectorcall.ll
…
cfi-epilogue-with-return.mir
Recommit "Generate Callee Saved Register (CSR) related cfi directives
2020-04-27 12:46:58 -07:00
cfi-epilogue-without-return.mir
Recommit "Generate Callee Saved Register (CSR) related cfi directives
2020-04-27 12:46:58 -07:00
cfi-inserter-callee-save-register-2.mir
Recommit "Generate Callee Saved Register (CSR) related cfi directives
2020-04-27 12:46:58 -07:00
cfi-inserter-callee-save-register.mir
Recommit "Generate Callee Saved Register (CSR) related cfi directives
2020-04-27 12:46:58 -07:00
cfi-inserter-cfg-with-merge.mir
…
cfi-inserter-check-order.ll
…
cfi-inserter-noreturnblock.mir
…
cfi-inserter-verify-inconsistent-csr.mir
Recommit "Generate Callee Saved Register (CSR) related cfi directives
2020-04-27 12:46:58 -07:00
cfi-inserter-verify-inconsistent-loc.mir
Recommit "Generate Callee Saved Register (CSR) related cfi directives
2020-04-27 12:46:58 -07:00
cfi-inserter-verify-inconsistent-offset.mir
…
cfi-inserter-verify-inconsistent-register.mir
…
cfi-xmm.ll
…
cfi.ll
…
cfstring.ll
…
cgp-usubo.ll
…
chain_order.ll
…
change-compare-stride-1.ll
…
change-compare-stride-trickiness-0.ll
…
change-compare-stride-trickiness-1.ll
…
change-compare-stride-trickiness-2.ll
…
change-unsafe-fp-math.ll
…
cldemote-intrinsic.ll
…
cleanuppad-inalloca.ll
…
cleanuppad-large-codemodel.ll
…
cleanuppad-realign.ll
…
clear_upper_vector_element_bits.ll
[SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad
2020-05-02 15:18:10 -07:00
clear-highbits.ll
[X86] Replace (most) X86ISD::SHLD/SHRD usage with ISD::FSHL/FSHR generic opcodes (PR39467)
2020-03-11 11:17:49 +00:00
clear-lowbits.ll
[X86] Replace (most) X86ISD::SHLD/SHRD usage with ISD::FSHL/FSHR generic opcodes (PR39467)
2020-03-11 11:17:49 +00:00
clflushopt.ll
…
clwb.ll
…
clz.ll
[X86] Add cttz/ctlz tests for i686 with CMOV target
2020-03-13 16:51:13 +00:00
clzero.ll
…
cmov-double.ll
…
cmov-fp.ll
[X86] Don't bother avoiding illegal FCMOVs if we don't have the cmov subtarget feature.
2020-02-21 00:34:15 -08:00
cmov-into-branch.ll
…
cmov-promotion.ll
…
cmov.ll
…
cmovcmov.ll
[DAGCombiner] Don't emit select_cc from visitSINT_TO_FP/visitUINT_TO_FP. Use plain select instead.
2020-03-01 10:52:17 -08:00
cmp-fast-isel.ll
…
cmp.ll
…
cmpxchg8b_alloca_regalloc_handling.ll
…
cmpxchg8b.ll
…
cmpxchg16b.ll
…
cmpxchg-clobber-flags.ll
…
cmpxchg-i1.ll
…
cmpxchg-i128-i1.ll
…
coal-sections.ll
…
coalesce_commute_movsd.ll
…
coalesce_commute_subreg.ll
…
coalesce-dbg-value-subreg-rewrite.mir
…
coalesce-dead-lanes.mir
…
coalesce-esp.ll
…
coalesce-implicitdef.ll
…
coalescer-commute1.ll
…
coalescer-commute2.ll
…
coalescer-commute3.ll
…
coalescer-commute4.ll
…
coalescer-commute5.ll
…
coalescer-cross.ll
…
coalescer-dce2.ll
…
coalescer-dce.ll
…
coalescer-identity.ll
…
coalescer-remat.ll
…
coalescer-subreg.ll
…
coalescer-win64.ll
…
code_placement_align_all.ll
…
code_placement_cold_loop_blocks.ll
…
code_placement_eh.ll
…
code_placement_ignore_succ_in_inner_loop.ll
…
code_placement_loop_rotation2.ll
…
code_placement_loop_rotation3.ll
…
code_placement_loop_rotation.ll
…
code_placement_no_header_change.ll
…
code_placement.ll
…
code-model-elf-memset.ll
…
code-model-elf.ll
…
code-model-kernel.ll
…
codegen-prepare-addrmode-sext.ll
…
codegen-prepare-cast.ll
…
codegen-prepare-collapse.ll
…
codegen-prepare-crash.ll
…
codegen-prepare-extload.ll
…
codegen-prepare-replacephi2.mir
…
codegen-prepare-replacephi.mir
…
codegen-prepare-uaddo.ll
…
codegen-prepare.ll
…
codemodel.ll
…
coff-comdat2.ll
…
coff-comdat3.ll
…
coff-comdat.ll
…
coff-feat00.ll
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coff-fp-section-name.ll
…
coff-linkonce.ll
[AsmPrinter] Emit .weak directive for weak linkage on COFF for symbols without a comdat
2020-03-28 18:48:58 +02:00
coff-no-dead-strip.ll
…
coff-weak.ll
[AsmPrinter] Emit .weak directive for weak linkage on COFF for symbols without a comdat
2020-03-28 18:48:58 +02:00
coldcc64.ll
…
combine-64bit-vec-binop.ll
…
combine-abs.ll
…
combine-adc.ll
…
combine-add-ssat.ll
…
combine-add-usat.ll
…
combine-add.ll
…
combine-addo.ll
…
combine-adx.ll
…
combine-and.ll
…
combine-avx2-intrinsics.ll
…
combine-avx-intrinsics.ll
…
combine-bextr.ll
…
combine-bitreverse.ll
…
combine-bitselect.ll
[X86] Improving folding of concat_vectors of subvectors from the same broadcast
2020-05-01 11:23:10 +01:00
combine-bswap.ll
…
combine-concatvectors.ll
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combine-fabs.ll
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combine-fcopysign.ll
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combine-lds.ll
…
combine-mul.ll
[X86] Add tests showing failure to fold mul(abs(x),abs(x)) -> mul(x,x) (PR39476)
2020-05-03 17:39:48 +01:00
combine-mulo.ll
…
combine-multiplies.ll
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combine-or.ll
…
combine-pmuldq.ll
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combine-ptest.ll
[X86][SSE] Combine PTEST(AND(X,Y),AND(X,Y)) -> PTEST(X,Y) and ANDN equivalents
2020-04-08 12:42:22 +01:00
combine-rotates.ll
[TargetLowering] Only demand a rotation's modulo amount bits
2020-03-17 21:23:46 +00:00
combine-sbb.ll
…
combine-sdiv.ll
…
combine-select.ll
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combine-sext-in-reg.ll
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combine-shl.ll
…
combine-smax.ll
…
combine-smin.ll
…
combine-sra.ll
…
combine-srem.ll
…
combine-srl.ll
…
combine-sse41-intrinsics.ll
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combine-sub-ssat.ll
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combine-sub-usat.ll
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combine-sub.ll
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combine-subo.ll
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combine-testm-and.ll
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combine-testpd.ll
[X86][SSE] combinePTESTCC - fold TESTZ(X,~Y) -> TESTC(Y,X)
2020-04-01 15:10:53 +01:00
combine-testps.ll
[X86][SSE] combinePTESTCC - fold TESTZ(X,~Y) -> TESTC(Y,X)
2020-04-01 15:10:53 +01:00
combine-udiv.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
combine-umax.ll
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combine-umin.ll
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combine-urem.ll
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combineIncDecVector-crash.ll
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commandline-metadata.ll
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commute-3dnow.ll
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commute-blend-avx2.ll
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commute-blend-sse41.ll
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commute-clmul.ll
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commute-fcmp.ll
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commute-intrinsic.ll
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commute-two-addr.ll
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commute-vpclmulqdq-avx512.ll
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commute-vpclmulqdq-avx.ll
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commute-xop.ll
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commuted-blend-mask.ll
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compact-unwind.ll
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
compare_folding.ll
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compare-add.ll
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compare-global.ll
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compare-inf.ll
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compiler_used.ll
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complex-asm.ll
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complex-fastmath.ll
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complex-fca.ll
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computeKnownBits_urem.ll
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concat-cast.ll
[x86] add tests for concat of casts; NFC
2020-05-04 15:22:31 -04:00
condbr_if.ll
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condbr_switch.ll
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conditional-indecrement.ll
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conditional-tailcall-pgso.ll
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conditional-tailcall-samedest.mir
…
conditional-tailcall.ll
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consecutive-load-shuffle.ll
…
const-base-addr.ll
…
const-shift-of-constmasked.ll
[DAG] MatchRotate - Add funnel shift by immediate support
2020-03-11 18:55:18 +00:00
constant-combines.ll
[Codegen] Revert rL354676/rL354677 and followups - introduced PR43446 miscompile
2020-02-25 20:30:12 +03:00
constant-hoisting-and.ll
…
constant-hoisting-bfi.ll
…
constant-hoisting-cmp.ll
…
constant-hoisting-optnone.ll
…
constant-hoisting-shift-immediate.ll
…
constant-pool-remat-0.ll
…
constant-pool-sharing.ll
…
constpool.ll
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constrained-fp80-trunc-ext.ll
…
constructor.ll
[X86] Reland D71360 Clean up UseInitArray initialization for X86ELFTargetObjectFile
2020-03-20 21:57:34 -07:00
convert-2-addr-3-addr-inc64.ll
…
copy-eflags-liveinlists.mir
…
copy-eflags.ll
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copy-propagation.ll
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copysign-constant-magnitude.ll
…
cpus-amd-no-x86_64.ll
…
cpus-amd.ll
…
cpus-intel-no-x86_64.ll
…
cpus-intel.ll
…
cpus-no-x86_64.ll
…
cpus-other.ll
…
crash-lre-eliminate-dead-def.ll
…
crash-nosse.ll
…
crash-O0.ll
…
crash.ll
…
critical-anti-dep-breaker.ll
…
critical-edge-split-2.ll
…
cse-add-with-overflow.ll
…
csr-split.ll
…
cstring.ll
…
ctor-priority-coff.ll
…
ctpop-combine.ll
…
cvt16.ll
…
cvtv2f32.ll
…
cxx_tlscc64.ll
…
dag-fmf-cse.ll
…
dag-merge-fast-accesses.ll
…
dag-optnone.ll
…
dag-rauw-cse.ll
…
dag-update-nodetomatch.ll
…
dagcombine-and-setcc.ll
…
dagcombine-buildvector.ll
…
dagcombine-cse.ll
…
dagcombine-select.ll
…
dagcombine-shifts.ll
…
dagcombine-tokenfactor-limit-crash.ll
…
dagcombine-unsafe-math.ll
…
darwin-bzero.ll
…
darwin-no-dead-strip.ll
…
darwin-preemption.ll
…
darwin-quote.ll
…
darwin-tls.ll
…
dbg-baseptr.ll
…
dbg-changes-codegen-branch-folding2.mir
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dbg-changes-codegen-branch-folding.ll
…
dbg-changes-codegen.ll
…
dbg-combine.ll
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dbg-line-0-no-discriminator.ll
…
dbg-value-func-arg.ll
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dbg-value-superreg-copy.mir
…
DbgValueOtherTargets.test
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debug-loclists-lto.ll
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debug-loclists.ll
…
debug-nodebug-crash.ll
…
debuginfo-locations-dce.ll
…
debugloc-argsize.ll
…
debugloc-no-line-0.ll
…
deopt-bundles.ll
…
deopt-intrinsic-cconv.ll
…
deopt-intrinsic.ll
…
disable-tail-calls.ll
…
discontiguous-loops.ll
…
discriminate-mem-ops-missing-info.ll
…
discriminate-mem-ops-skip-pfetch.ll
…
discriminate-mem-ops.ll
…
div8.ll
…
div-rem-pair-recomposition-signed.ll
…
div-rem-pair-recomposition-unsigned.ll
…
div-rem-simplify.ll
…
divide-by-constant.ll
…
divide-windows-itanium.ll
…
divrem8_ext.ll
…
divrem.ll
…
dllexport-x86_64.ll
[AsmPrinter] Emit .weak directive for weak linkage on COFF for symbols without a comdat
2020-03-28 18:48:58 +02:00
dllexport.ll
[AsmPrinter] Emit .weak directive for weak linkage on COFF for symbols without a comdat
2020-03-28 18:48:58 +02:00
dllimport-x86_64.ll
…
dllimport.ll
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dollar-name.ll
…
domain-reassignment-implicit-def.ll
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domain-reassignment-test.ll
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domain-reassignment.mir
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dont-remove-empty-preheader.ll
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dont-trunc-store-double-to-float.ll
…
dropped_constructor.ll
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dtor-priority-coff.ll
…
dwarf-comp-dir.ll
…
dwarf-eh-prepare.ll
…
dwarf-headers.ll
…
dwarf-split-line-1.ll
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dwarf-split-line-2.ll
…
dyn_alloca_aligned.ll
…
dyn-stackalloc.ll
…
dynamic-alloca-in-entry.ll
…
dynamic-alloca-lifetime.ll
…
dynamic-allocas-VLAs.ll
…
dynamic-regmask.ll
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DynamicCalleeSavedRegisters.ll
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early-cfi-sections.ll
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early-ifcvt-crash.ll
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early-ifcvt.ll
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eh_frame.ll
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eh-frame-unreachable.ll
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eh-label.ll
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eh-nolandingpads.ll
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eh-null-personality.ll
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eh-unknown.ll
…
eip-addressing-i386.ll
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element-wise-atomic-memory-intrinsics.ll
…
elf-associated.ll
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elf-comdat2.ll
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elf-comdat.ll
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emit-big-cst.ll
[AsmPrinter] Fix emission of non-standard integer constants for BE targets
2020-04-27 14:57:29 -07:00
empty-function.ll
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empty-functions.ll
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empty-struct-return-type.ll
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emutls_generic.ll
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emutls-pic.ll
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emutls-pie.ll
…
emutls.ll
[X86] Remove defunct section checks from emulated TLS tests to fix issue reported on D77354
2020-04-03 16:46:09 +01:00
enqcmd-intrinsics.ll
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epilogue-cfi-fp.ll
…
epilogue-cfi-no-fp.ll
…
epilogue.ll
…
equiv_with_fndef.ll
…
equiv_with_vardef.ll
…
evex-to-vex-compress.mir
[X86] Fix a few issues in the evex-to-vex-compress.mir test.
2020-05-02 18:02:12 -07:00
exception-label.ll
…
exedeps-movq.ll
…
exedepsfix-broadcast.ll
…
expand-integer-x86_64-intrinsic-error.ll
…
expand-opaque-const.ll
…
expand-post-ra-pseudo.mir
…
expand-vr64-gr64-copy.mir
…
explicit-section-mergeable.ll
[MC][ELF] Put explicit section name symbols into entry size compatible sections
2020-04-16 19:12:49 +00:00
extend-set-cc-uses-dbg.ll
…
extend.ll
…
extended-fma-contraction.ll
…
extern_weak.ll
…
extmul64.ll
…
extmul128.ll
…
extract-bits.ll
[X86] Replace (most) X86ISD::SHLD/SHRD usage with ISD::FSHL/FSHR generic opcodes (PR39467)
2020-03-11 11:17:49 +00:00
extract-combine.ll
…
extract-concat.ll
[X86][SSE] getFauxShuffle - support insert(truncate/extend(extract(vec0,c0)),vec1,c1) shuffle patterns at the byte level
2020-04-26 15:31:01 +01:00
extract-extract.ll
…
extract-fp.ll
…
extract-insert.ll
…
extract-lowbits.ll
[X86] Replace (most) X86ISD::SHLD/SHRD usage with ISD::FSHL/FSHR generic opcodes (PR39467)
2020-03-11 11:17:49 +00:00
extract-store.ll
…
extractelement-fp.ll
…
extractelement-from-arg.ll
…
extractelement-index.ll
…
extractelement-legalization-cycle.ll
…
extractelement-legalization-store-ordering.ll
…
extractelement-load.ll
[x86] allow peeking through an extract_subvector to find a splatted operand
2020-02-20 13:59:59 -05:00
extractelement-shuffle.ll
…
extractps.ll
…
f16c-intrinsics-fast-isel.ll
[X86][F16C] Remove cvtph2ps intrinsics and use generic half2float conversion (PR37554)
2020-02-29 18:57:35 +00:00
f16c-intrinsics-upgrade.ll
[X86][F16C] Remove cvtph2ps intrinsics and use generic half2float conversion (PR37554)
2020-02-29 18:57:35 +00:00
f16c-intrinsics.ll
[X86][F16C] Remove cvtph2ps intrinsics and use generic half2float conversion (PR37554)
2020-02-29 18:57:35 +00:00
fabs.ll
…
fadd-combines.ll
…
fast-cc-callee-pops.ll
…
fast-cc-merge-stack-adj.ll
…
fast-cc-pass-in-regs.ll
…
fast-isel-abort-warm.ll
…
fast-isel-agg-constant.ll
…
fast-isel-args-fail2.ll
…
fast-isel-args-fail.ll
…
fast-isel-args.ll
…
fast-isel-atomic.ll
…
fast-isel-avoid-unnecessary-pic-base.ll
…
fast-isel-bail.ll
…
fast-isel-bc.ll
…
fast-isel-bitcasts-avx512.ll
…
fast-isel-bitcasts-avx.ll
…
fast-isel-bitcasts.ll
…
fast-isel-branch_weights.ll
…
fast-isel-call-bool.ll
…
fast-isel-call-cleanup.ll
…
fast-isel-call.ll
…
fast-isel-cmp-branch2.ll
…
fast-isel-cmp-branch3.ll
…
fast-isel-cmp-branch.ll
…
fast-isel-cmp.ll
…
fast-isel-constant.ll
…
fast-isel-constpool.ll
…
fast-isel-constrain-store-indexreg.ll
…
fast-isel-deadcode.ll
…
fast-isel-divrem-x86-64.ll
…
fast-isel-divrem.ll
…
fast-isel-double-half-convertion.ll
…
fast-isel-emutls.ll
…
fast-isel-expect.ll
…
fast-isel-extract.ll
…
fast-isel-float-half-convertion.ll
…
fast-isel-fneg-kill.ll
…
fast-isel-fneg.ll
…
fast-isel-fold-mem.ll
…
fast-isel-fptrunc-fpext.ll
…
fast-isel-freeze.ll
[DAGCombine] Add basic optimizations for FREEZE in SelDag
2020-03-27 12:20:39 +09:00
fast-isel-gc-intrinsics.ll
…
fast-isel-gep.ll
…
fast-isel-gv.ll
…
fast-isel-i1.ll
…
fast-isel-int-float-conversion-x86-64.ll
…
fast-isel-int-float-conversion.ll
…
fast-isel-load-i1.ll
…
fast-isel-mem.ll
…
fast-isel-movsbl-indexreg.ll
…
fast-isel-nontemporal.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
fast-isel-noplt-pic.ll
…
fast-isel-ret-ext.ll
…
fast-isel-select-cmov2.ll
…
fast-isel-select-cmov.ll
…
fast-isel-select-cmp.ll
…
fast-isel-select-pseudo-cmov.ll
…
fast-isel-select-sse.ll
…
fast-isel-select.ll
…
fast-isel-sext-zext.ll
…
fast-isel-sext.ll
…
fast-isel-shift.ll
…
fast-isel-sse12-fptoint.ll
…
fast-isel-stackcheck.ll
…
fast-isel-store.ll
…
fast-isel-tailcall.ll
…
fast-isel-tls.ll
…
fast-isel-trunc-kill-subreg.ll
…
fast-isel-uint-float-conversion-x86-64.ll
…
fast-isel-uint-float-conversion.ll
…
fast-isel-vecload.ll
…
fast-isel-x32.ll
…
fast-isel-x86-64.ll
…
fast-isel-x86.ll
…
fast-isel.ll
[SelDag] Add FREEZE
2020-03-24 23:04:58 +09:00
fastcall-correct-mangling.ll
…
fastcc3struct.ll
…
fastcc-2.ll
…
fastcc-byval.ll
…
fastcc-sret.ll
…
fastcc.ll
…
fastisel-gep-promote-before-add.ll
…
fastisel-softfloat.ll
…
fastmath-float-half-conversion.ll
…
fcmove.ll
…
fcmp-constant.ll
…
fdiv-combine-vec.ll
…
fdiv-combine.ll
…
fdiv.ll
[DAGCombiner] Fix non-determinism problem related to argument evaluation order in visitFDIV
2020-03-20 16:11:17 +01:00
fentry-insertion.ll
…
field-extract-use-trunc.ll
…
fildll.ll
…
file-directive.ll
…
file-source-filename.ll
…
finite-libcalls.ll
No longer generate calls to *_finite
2020-02-28 10:07:37 +01:00
fixed-stack-di-mir.ll
…
fixup-bw-copy.ll
…
fixup-bw-copy.mir
…
fixup-bw-inst.ll
…
fixup-bw-inst.mir
…
fixup-lea.ll
…
flags-copy-lowering.mir
…
float-asmprint.ll
…
float-conv-elim.ll
…
floor-soft-float.ll
…
flt-rounds.ll
[SelectionDAG][PowerPC][AArch64][X86][ARM] Add chain input and output the ISD::FLT_ROUNDS_
2020-02-25 16:58:23 -08:00
fltused_function_pointer.ll
…
fltused_math.ll
…
fltused.ll
…
fma4-commute-x86.ll
…
fma4-fneg-combine.ll
…
fma4-intrinsics-x86_64-folded-load.ll
…
fma4-intrinsics-x86-upgrade.ll
…
fma4-intrinsics-x86.ll
…
fma4-scalar-memfold.ll
…
fma_patterns_wide.ll
…
fma_patterns.ll
…
fma-commute-loop.ll
[X86][TwoAddressInstructionPass] Teach tryInstructionCommute to continue checking for commutable FMA operands in more cases.
2020-03-01 16:38:08 -08:00
fma-commute-x86.ll
…
fma-do-not-commute.ll
…
fma-fneg-combine-2.ll
…
fma-fneg-combine.ll
[X86] Print k-mask in FMA3 comments.
2020-04-12 13:16:53 -07:00
fma-intrinsics-canonical.ll
…
fma-intrinsics-fast-isel.ll
…
fma-intrinsics-phi-213-to-231.ll
…
fma-intrinsics-x86-upgrade.ll
…
fma-intrinsics-x86.ll
…
fma-phi-213-to-231.ll
…
fma-scalar-combine.ll
[X86] Print k-mask in FMA3 comments.
2020-04-12 13:16:53 -07:00
fma-scalar-memfold.ll
…
fma.ll
[x86] allow peeking through an extract_subvector to find a splatted operand
2020-02-20 13:59:59 -05:00
fmaddsub-combine.ll
…
fmaxnum.ll
[X86][SSE] Add SSE41 coverage for fmaxnum/fminnum tests
2020-03-10 11:18:27 +00:00
fmf-flags.ll
[x86] use instruction-level fast-math-flags to drive MachineCombiner
2020-02-27 15:19:37 -05:00
fmf-propagation.ll
…
fmf-reduction.ll
…
fminnum.ll
[X86][SSE] Add SSE41 coverage for fmaxnum/fminnum tests
2020-03-10 11:18:27 +00:00
fmsubadd-combine.ll
…
fmul-combines.ll
…
fnabs.ll
…
fold-add-pcrel.ll
…
fold-add.ll
…
fold-and-shift-x86_64.ll
…
fold-and-shift.ll
…
fold-call-2.ll
…
fold-call-3.ll
…
fold-call-oper.ll
…
fold-call.ll
…
fold-imm.ll
…
fold-load-binops.ll
…
fold-load-unops.ll
…
fold-load-vec.ll
…
fold-load.ll
…
fold-mul-lohi.ll
…
fold-pcmpeqd-1.ll
…
fold-pcmpeqd-2.ll
…
fold-push.ll
…
fold-rmw-ops.ll
…
fold-sext-trunc.ll
…
fold-tied-op.ll
…
fold-vector-bv-crash.ll
…
fold-vector-sext-crash2.ll
…
fold-vector-sext-crash.ll
…
fold-vector-sext-zext.ll
…
fold-vector-shl-crash.ll
…
fold-vector-shuffle-crash.ll
…
fold-vector-trunc-sitofp.ll
…
fold-vex.ll
…
fold-xmm-zero.ll
…
fold-zext-trunc.ll
…
fops-windows-itanium.ll
…
force-align-stack-alloca.ll
…
force-align-stack.ll
…
fp2sint.ll
…
fp80-strict-scalar-cmp.ll
…
fp80-strict-scalar.ll
…
fp128-calling-conv.ll
…
fp128-cast-strict.ll
…
fp128-cast.ll
…
fp128-compare.ll
…
fp128-extract.ll
…
fp128-g.ll
…
fp128-i128.ll
…
fp128-libcalls-strict.ll
…
fp128-libcalls.ll
…
fp128-load.ll
…
fp128-select.ll
…
fp128-store.ll
…
fp_constant_op.ll
…
fp_load_cast_fold.ll
…
fp_load_fold.ll
…
fp-arith.ll
…
fp-cvt.ll
…
fp-double-rounding.ll
…
fp-elim-and-no-fp-elim.ll
…
fp-elim.ll
…
fp-fast.ll
…
fp-fold.ll
…
fp-immediate-shorten.ll
…
fp-in-intregs.ll
…
fp-intrinsics-flags-x86_64.ll
…
fp-intrinsics-flags.ll
[SelectionDAGBuilder][FPEnv] Take into account SelectionDAG continuous CSE when setting the nofpexcept flag for constrained intrinsics
2020-03-18 13:37:17 -07:00
fp-intrinsics-fma.ll
…
fp-intrinsics.ll
…
fp-load-trunc.ll
…
fp-logic-replace.ll
…
fp-logic.ll
…
fp-round.ll
…
fp-select-cmp-and.ll
…
fp-stack-2results.ll
…
fp-stack-compare-cmov.ll
…
fp-stack-compare.ll
…
fp-stack-direct-ret.ll
…
fp-stack-O0-crash.ll
…
fp-stack-O0.ll
…
fp-stack-ret-conv.ll
…
fp-stack-ret-store.ll
…
fp-stack-ret.ll
…
fp-stack-retcopy.ll
…
fp-stack-set-st1.ll
…
fp-stack.ll
…
fp-strict-libcalls-msvc32.ll
…
fp-strict-scalar-cmp.ll
…
fp-strict-scalar-fptoint.ll
…
fp-strict-scalar-inttofp.ll
…
fp-strict-scalar-round.ll
…
fp-strict-scalar.ll
…
fp-trunc.ll
…
fp-undef.ll
…
fp-une-cmp.ll
…
fpcmp-soft-fp.ll
…
fpstack-debuginstr-kill.ll
…
fptosi-constant.ll
…
frame-base.ll
…
frame-lowering-debug-intrinsic-2.ll
…
frame-lowering-debug-intrinsic.ll
…
frame-order.ll
…
frameaddr.ll
…
frameregister.ll
…
freeze-combine.ll
[DAGCombine] Add basic optimizations for FREEZE in SelDag
2020-03-27 12:20:39 +09:00
freeze-legalize.ll
[DAGCombine] Add basic optimizations for FREEZE in SelDag
2020-03-27 12:20:39 +09:00
freeze.ll
[SelectionDAGBuilder] Fix ISD::FREEZE creation for structs with fields of different types.
2020-04-06 11:03:40 -07:00
frem-msvc32.ll
…
fsgsbase.ll
…
fshl.ll
[DAG] MatchRotate - Add funnel shift by immediate support
2020-03-11 18:55:18 +00:00
fshr.ll
[DAG] MatchRotate - Add funnel shift by immediate support
2020-03-11 18:55:18 +00:00
fsxor-alignment.ll
…
ftrunc.ll
[x86] use vector instructions to lower even more FP->int->FP casts
2020-04-25 11:38:54 -04:00
full-lsr.ll
…
funclet-layout.ll
…
function-alias.ll
…
function-subtarget-features-2.ll
…
function-subtarget-features.ll
…
funnel-shift-rot.ll
…
funnel-shift.ll
[DAG] Don't permit EXTLOAD when combining FSHL/FSHR consecutive loads (PR45265)
2020-03-21 10:52:41 +00:00
ga-offset2.ll
…
ga-offset.ll
…
gather-addresses.ll
…
gcc_except_table_functions.ll
…
gcc_except_table.ll
…
gep-expanded-vector.ll
…
getelementptr.ll
…
gfni-intrinsics.ll
…
ghc-cc64.ll
…
ghc-cc.ll
…
global-access-pie.ll
…
global-fill.ll
[AsmPrinter] Fix emission of non-standard integer constants for BE targets
2020-04-27 14:57:29 -07:00
global-sections-comdat.ll
…
global-sections-tls.ll
…
global-sections.ll
…
gnu-seh-nolpads.ll
…
gpr-to-mask.ll
…
greedy_regalloc_bad_eviction_sequence.ll
…
gs-fold.ll
…
h-register-addressing-32.ll
[X86] Regenerate hi reg tests
2020-02-21 14:23:54 +00:00
h-register-addressing-64.ll
[X86] Regenerate hi reg tests
2020-02-21 14:23:54 +00:00
h-register-store.ll
…
h-registers-0.ll
…
h-registers-1.ll
…
h-registers-2.ll
…
h-registers-3.ll
…
haddsub-2.ll
…
haddsub-3.ll
…
haddsub-broadcast.ll
…
haddsub-shuf-undef-operand.ll
…
haddsub-shuf.ll
[X86][SSE] Combine unary shuffle(HORIZOP,HORIZOP) -> HORIZOP
2020-04-05 22:49:46 +01:00
haddsub-undef.ll
[X86][SSE] Combine unary shuffle(HORIZOP,HORIZOP) -> HORIZOP
2020-04-05 22:49:46 +01:00
haddsub.ll
…
half-constrained.ll
…
half.ll
[X86] Add DAG combines to form CVTPH2PS/CVTPS2PH from vXf16->vXf32/vXf64 fp_extends and vXf32->vXf16 fp_round.
2020-02-20 08:26:17 -08:00
handle-move.ll
…
heap-alloc-markers.mir
…
hhvm-cc.ll
…
hidden-vis-2.ll
…
hidden-vis-3.ll
…
hidden-vis-4.ll
…
hidden-vis-pic.ll
…
hidden-vis.ll
…
hipe-cc64.ll
…
hipe-cc.ll
…
hipe-prologue.ll
…
hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
…
hoist-and-by-const-from-shl-in-eqcmp-zero.ll
[TargetLowering] SimplifyDemandedBits - fix SCALAR_TO_VECTOR knownbits bug
2020-02-28 15:23:37 +00:00
hoist-common.ll
…
hoist-invariant-load.ll
Revert "Reland "[DebugInfo] Enable the debug entry values feature by default""
2020-02-20 14:41:39 +01:00
hoist-spill-lpad.ll
…
hoist-spill.ll
…
horizontal-reduce-smax.ll
[X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0)
2020-03-13 18:43:04 +00:00
horizontal-reduce-smin.ll
[DAG] SimplifyDemandedVectorElts - remove INSERT_SUBVECTOR if we don't demand the subvector
2020-05-01 16:20:51 +01:00
horizontal-reduce-umax.ll
[X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0)
2020-03-13 18:43:04 +00:00
horizontal-reduce-umin.ll
[X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0)
2020-03-13 18:43:04 +00:00
horizontal-shuffle-demanded.ll
…
horizontal-shuffle.ll
…
huge-stack-offset2.ll
…
huge-stack-offset.ll
…
i1narrowfail.ll
…
i2k.ll
…
i16lshr8pat.ll
…
i64-mem-copy.ll
…
i64-to-float.ll
[X86] Always emit an integer vbroadcast_load from lowerBuildVectorAsBroadcast regardless of AVX vs AVX2
2020-03-03 10:39:11 -08:00
i128-add.ll
…
i128-and-beyond.ll
…
i128-immediate.ll
…
i128-mul.ll
…
i128-ret.ll
…
i128-sdiv.ll
…
i256-add.ll
…
i386-setjmp-pic.ll
…
i386-shrink-wrapping.ll
…
i386-tlscall-fastregalloc.ll
…
i486-fence-loop.ll
…
i686-win-shrink-wrapping.ll
…
iabs.ll
…
icall-branch-funnel.ll
…
icmp-opt.ll
…
ident-metadata.ll
…
ifunc-asm.ll
…
illegal-bitfield-loadstore.ll
…
illegal-insert.ll
…
illegal-vector-args-return.ll
…
immediate_merging64.ll
…
immediate_merging.ll
…
implicit-faultmap.ll
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
implicit-null-check-negative.ll
…
implicit-null-check.ll
…
implicit-null-checks.mir
…
implicit-null-chk-reg-rewrite.mir
…
implicit-use-spill.mir
…
imul-lea-2.ll
…
imul-lea.ll
…
imul.ll
…
inalloca-ctor.ll
…
inalloca-invoke.ll
…
inalloca-regparm.ll
…
inalloca-stdcall.ll
…
inalloca.ll
…
inc-of-add.ll
…
inconsistent_landingpad.ll
…
indirect-branch-tracking-cm-lager.ll
Enable IBT(Indirect Branch Tracking) in JIT with CET(Control-flow Enforcement Technology)
2020-04-07 09:48:47 +08:00
indirect-branch-tracking-eh2.ll
Handle CET for -exception-model sjlj
2020-04-20 11:13:40 +08:00
indirect-branch-tracking-eh.ll
Handle CET for -exception-model sjlj
2020-04-20 11:13:40 +08:00
indirect-branch-tracking-r2.ll
…
indirect-branch-tracking.ll
…
indirect-hidden.ll
…
init-priority.ll
[X86] Reland D71360 Clean up UseInitArray initialization for X86ELFTargetObjectFile
2020-03-20 21:57:34 -07:00
inline-0bh.ll
[llvm] Fix missing FileCheck directive colons
2020-04-06 09:59:08 -06:00
inline-asm-2addr.ll
…
inline-asm-A-constraint.ll
…
inline-asm-avx512f-v-constraint.ll
…
inline-asm-avx512f-x-constraint.ll
[MIR] Add comments to INLINEASM immediate flag MachineOperands
2020-04-16 13:46:14 +02:00
inline-asm-avx512vl-v-constraint-32bit.ll
…
inline-asm-avx512vl-v-constraint.ll
…
inline-asm-avx-v-constraint-32bit.ll
…
inline-asm-avx-v-constraint.ll
…
inline-asm-bad-constraint-n.ll
…
inline-asm-bad-modifier.ll
[X86] Add x, t and g modifiers for inline asm
2020-04-30 17:45:45 -07:00
inline-asm-default-clobbers.ll
[MIR] Add comments to INLINEASM immediate flag MachineOperands
2020-04-16 13:46:14 +02:00
inline-asm-duplicated-constraint.ll
…
inline-asm-e-constraint.ll
…
inline-asm-error.ll
…
inline-asm-flag-clobber.ll
…
inline-asm-flag-output.ll
…
inline-asm-fpstack.ll
…
inline-asm-h.ll
…
inline-asm-i-constraint-i1.ll
…
inline-asm-imm-out-of-range.ll
…
inline-asm-modifier-c.ll
…
inline-asm-modifier-n.ll
…
inline-asm-modifier-q.ll
…
inline-asm-modifier-V.ll
…
inline-asm-mrv.ll
…
inline-asm-multilevel-gep.ll
…
inline-asm-n-constraint.ll
…
inline-asm-out-regs.ll
…
inline-asm-pic.ll
…
inline-asm-ptr-cast.ll
…
inline-asm-q-regs.ll
…
inline-asm-R-constraint.ll
…
inline-asm-sp-clobber-memcpy.ll
…
inline-asm-stack-realign2.ll
…
inline-asm-stack-realign3.ll
…
inline-asm-stack-realign.ll
…
inline-asm-tied.ll
…
inline-asm-x-scalar.ll
…
inline-asm.ll
…
inline-sse.ll
…
inlineasm-sched-bug.ll
…
inreg.ll
…
ins_split_regalloc.ll
…
ins_subreg_coalesce-1.ll
…
ins_subreg_coalesce-2.ll
…
ins_subreg_coalesce-3.ll
…
insert-into-constant-vector.ll
…
insert-loaded-scalar.ll
…
insert-positions.ll
…
insert-prefetch-inline.afdo
…
insert-prefetch-inline.ll
…
insert-prefetch-invalid-instr.afdo
…
insert-prefetch-invalid-instr.ll
…
insert-prefetch-other.afdo
…
insert-prefetch.afdo
…
insert-prefetch.ll
…
insertelement-copytoregs.ll
…
insertelement-duplicates.ll
…
insertelement-legalize.ll
…
insertelement-ones.ll
[X86][SSE] SimplifyDemandedVectorEltsForTargetNode - reduce vector width of X86ISD::BLENDI
2020-03-09 18:29:28 +00:00
insertelement-shuffle.ll
[X86][SSE] getFauxShuffleMask - add support for INSERT_VECTOR_ELT(EXTRACT_VECTOR_ELT) shuffle pattern
2020-03-10 15:42:37 +00:00
insertelement-var-index.ll
[x86] allow peeking through an extract_subvector to find a splatted operand
2020-02-20 13:59:59 -05:00
insertelement-zero.ll
…
insertps-combine.ll
…
insertps-from-constantpool.ll
…
insertps-O0-bug.ll
…
insertps-unfold-load-bug.ll
…
instr-symbols.mir
…
int-intrinsic.ll
…
intersect-fma-fmf.ll
…
interval-update-remat.ll
…
invalid-liveness.mir
…
invalid-shift-immediate.ll
…
invpcid-intrinsic.ll
…
ipra-inline-asm.ll
…
ipra-local-linkage.ll
…
ipra-reg-alias.ll
…
ipra-reg-usage.ll
…
ipra-transform.ll
…
isel-blendi-gettargetconstant.ll
…
isel-optnone.ll
…
isel-sink2.ll
…
isel-sink3.ll
…
isel-sink.ll
…
isint.ll
[x86] use vector instructions to lower more FP->int->FP casts
2020-04-19 08:33:17 -04:00
isnan2.ll
…
isnan.ll
…
ispositive.ll
…
jump_sign.ll
…
known-bits-vector.ll
…
known-bits.ll
[DAG] MatchRotate - Add funnel shift by immediate support
2020-03-11 18:55:18 +00:00
known-signbits-vector.ll
[X86][AVX] combineVectorSignBitsTruncation - avoid complex vXi64->vXi32 PACKSS truncations (PR45794)
2020-05-05 11:57:25 +01:00
kshift.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
label-annotation.ll
…
label-heapallocsite.ll
…
label-redefinition.ll
…
lack-of-signed-truncation-check.ll
…
lakemont.ll
…
large-code-model-isel.ll
…
large-constants.ll
…
large-gep-chain.ll
…
large-gep-scale.ll
…
large-global.ll
…
large-pic-string.ll
…
late-address-taken.ll
…
late-remat-update-2.mir
…
late-remat-update.mir
…
ldzero.ll
…
lea-2.ll
…
lea-3.ll
…
lea-4.ll
…
lea-5.ll
…
lea-dagdag.ll
…
lea-opt-cse1.ll
…
lea-opt-cse2.ll
…
lea-opt-cse3.ll
…
lea-opt-cse4.ll
…
lea-opt-memop-check-1.ll
…
lea-opt-memop-check-2.ll
…
lea-opt-with-debug.mir
…
lea-opt.ll
…
lea-recursion.ll
…
lea.ll
…
leaf-fp-elim.ll
…
leaFixup32.mir
…
leaFixup64.mir
…
legalize-fmp-oeq-vector-select.ll
…
legalize-libcalls.ll
…
legalize-shift-64.ll
…
legalize-shift.ll
…
legalize-shl-vec.ll
…
legalize-sub-zero-2.ll
…
legalize-sub-zero.ll
…
legalize-types-remapid.ll
reland: [DAG] Fix PR45049: LegalizeTypes crash
2020-04-12 09:52:17 -06:00
legalize-vaarg.ll
…
legalizedag_vec.ll
…
libcall-sret.ll
…
licm-dominance.ll
…
licm-nested.ll
…
licm-regpressure.ll
…
licm-symbol.ll
…
lifetime-alias.ll
[Codegen] Revert rL354676/rL354677 and followups - introduced PR43446 miscompile
2020-02-25 20:30:12 +03:00
limit-split-cost.mir
…
limited-prec.ll
…
linux-preemption.ll
[X86] Fix weak global label issue reported on D77354
2020-04-03 16:15:24 +01:00
lit.local.cfg
…
live-out-reg-info.ll
…
live-range-nosubreg.ll
…
liveness-local-regalloc.ll
…
llc-override-mcpu-mattr.ll
…
llc-print-machineinstrs.mir
…
llc-start-stop-instance.ll
…
llrint-conv.ll
…
llround-conv.ll
…
load-combine-dbg.ll
…
load-combine.ll
…
load-local-v3i1.ll
[SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad
2020-05-02 15:18:10 -07:00
load-local-v4i5.ll
[SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad
2020-05-02 15:18:10 -07:00
load-partial.ll
[TargetLowering] SimplifyDemandedVectorElts - add DemandedElts mask to ISD::BITCAST SimplifyDemandedBits call.
2020-03-10 13:39:10 +00:00
load-scalar-as-vector.ll
…
load-slice.ll
…
loadStore_vectorizer.ll
…
loc-remat.ll
…
local_stack_symbol_ordering.ll
…
localescape.ll
…
log2_not_readnone.ll
…
logical-load-fold.ll
…
long-setcc.ll
…
longlong-deadload.ll
…
loop-blocks.ll
…
loop-hoist.ll
…
loop-rotate.ll
…
loop-search.ll
…
loop-strength-reduce2.ll
…
loop-strength-reduce4.ll
…
loop-strength-reduce5.ll
…
loop-strength-reduce6.ll
…
loop-strength-reduce7.ll
…
loop-strength-reduce8.ll
…
loop-strength-reduce-2.ll
…
loop-strength-reduce-3.ll
…
loop-strength-reduce-crash.ll
…
loop-strength-reduce.ll
…
lower-bitcast.ll
…
lower-ptrmask.ll
…
lower-vec-shift-2.ll
…
lower-vec-shift.ll
…
lower-vec-shuffle-bug.ll
…
lrint-conv-i32.ll
…
lrint-conv-i64.ll
…
lround-conv-i32.ll
…
lround-conv-i64.ll
…
lrshrink.ll
…
lsr-crash-empty-uses.ll
…
lsr-delayed-fold.ll
…
lsr-i386.ll
…
lsr-interesting-step.ll
…
lsr-loop-exit-cond.ll
…
lsr-negative-stride.ll
…
lsr-nonaffine.ll
…
lsr-normalization.ll
…
lsr-overflow.ll
…
lsr-quadratic-expand.ll
…
lsr-redundant-addressing.ll
…
lsr-reuse-trunc.ll
…
lsr-reuse.ll
…
lsr-sort.ll
…
lsr-static-addr.ll
…
lsr-wrap.ll
…
lvi-hardening-indirectbr.ll
[X86] Add Indirect Thunk Support to X86 to mitigate Load Value Injection (LVI)
2020-04-03 00:34:39 -07:00
lvi-hardening-ret.ll
[X86] Add RET-hardening Support to mitigate Load Value Injection (LVI)
2020-04-03 12:08:34 -07:00
lwp-intrinsics-x86_64.ll
…
lwp-intrinsics.ll
…
lzcnt-tzcnt.ll
…
lzcnt-zext-cmp.ll
…
lzcnt.ll
…
macCatalyst.ll
…
machine-combiner-int-vec.ll
…
machine-combiner-int.ll
…
machine-combiner.ll
[x86] use instruction-level fast-math-flags to drive MachineCombiner
2020-02-27 15:19:37 -05:00
machine-copy-prop.mir
…
machine-cp-debug.mir
…
machine-cp.ll
…
machine-cse.ll
…
machine-outliner-cfi-tail-some.mir
fix to outline cfi instruction when can be grouped in a tail call
2020-04-17 22:26:34 -07:00
machine-outliner-cfi-tail.mir
fix to outline cfi instruction when can be grouped in a tail call
2020-04-17 22:26:34 -07:00
machine-outliner-debuginfo.ll
…
machine-outliner-disubprogram.ll
…
machine-outliner-noredzone.ll
…
machine-outliner-tailcalls.ll
…
machine-outliner.ll
…
machine-region-info.mir
…
machine-sink-and-implicit-null-checks.ll
…
machine-sink.ll
[BFI] Fix missed BFI updates in MachineSink.
2020-02-21 09:50:54 -08:00
machine-trace-metrics-crash.ll
…
MachineBranchProb.ll
…
MachineSink-CritEdge.ll
…
MachineSink-DbgValue.ll
…
MachineSink-eflags.ll
…
machinesink-merge-debuginfo.ll
…
machinesink-null-debuginfo.ll
…
MachineSink-PHIUse.ll
…
MachineSink-SubReg.ll
…
macho-comdat.ll
…
macho-trap.ll
…
madd.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
mangle-question-mark.ll
…
mask-negated-bool.ll
…
masked_compressstore.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
masked_expandload.ll
[DAG] SimplifyDemandedVectorElts - add EXTRACT_SUBVECTOR SimplifyMultipleUseDemandedBits handling
2020-05-01 13:48:07 +01:00
masked_gather_scatter_widen.ll
…
masked_gather_scatter.ll
[SelectionDAGBuilder][CGP][X86] Move some of SDB's gather/scatter uniform base handling to CGP.
2020-04-16 17:49:22 -07:00
masked_gather.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
masked_load.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
masked_store_trunc_ssat.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
masked_store_trunc_usat.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
masked_store_trunc.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
masked_store.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
masked-iv-safe.ll
…
masked-iv-unsafe.ll
…
maskmovdqu.ll
…
materialize.ll
[X86] make sure POP has implicit def/use of stack pointer when materializing 8-bit immediates for minsize
2020-03-30 09:25:31 -07:00
mature-mc-support.ll
…
mbp-false-cfg-break.ll
…
mcinst-avx-lowering.ll
…
mcinst-lowering.ll
…
mcu-abi.ll
…
mem-intrin-base-reg.ll
…
mem-promote-integers.ll
…
membarrier.ll
…
memcmp-constant.ll
[ExpandMemCmp][NFC] Add more tests.
2020-03-12 08:49:51 +01:00
memcmp-mergeexpand.ll
…
memcmp-minsize.ll
[ExpandMemCmp][NFC] Regenerate tests.
2020-03-03 15:09:55 +01:00
memcmp-more-load-pairs.ll
[ExpandMemCmp] Allow overlaping loads in the zero-relational case.
2020-04-02 11:20:47 +02:00
memcmp-optsize.ll
[ExpandMemCmp] Properly constant-fold all compares.
2020-03-09 10:40:52 +01:00
memcmp-pgso.ll
[ExpandMemCmp] Properly constant-fold all compares.
2020-03-09 10:40:52 +01:00
memcmp.ll
[ExpandMemCmp] Allow overlaping loads in the zero-relational case.
2020-04-02 11:20:47 +02:00
memcpy-2.ll
…
memcpy-from-string.ll
…
memcpy-inline.ll
…
memcpy-struct-by-value.ll
…
memcpy.ll
…
mempcpy-32.ll
…
mempcpy.ll
…
memset64-on-x86-32.ll
…
memset-2.ll
…
memset-3.ll
…
memset-nonzero.ll
…
memset-sse-stack-realignment.ll
…
memset-zero.ll
…
memset.ll
…
merge_store_duplicated_loads.ll
…
merge_store.ll
…
merge-consecutive-loads-128.ll
[X86] Teach EltsFromConsecutiveLoads that it's ok to form a v4f32 VZEXT_LOAD with a 64 bit memory size on SSE1 targets.
2020-02-22 18:50:52 -08:00
merge-consecutive-loads-256.ll
…
merge-consecutive-loads-512.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
merge-consecutive-stores-i1.ll
…
merge-consecutive-stores-nt.ll
…
merge-consecutive-stores.ll
…
merge-sp-update-lea.ll
…
merge-sp-updates-cfi.ll
…
merge-store-constants.ll
…
merge-store-partially-alias-loads.ll
…
merge-vector-stores-scale-idx-crash.ll
…
MergeConsecutiveStores.ll
…
mfence.ll
…
midpoint-int-vec-128.ll
[X86] Improve combineVectorShiftImm
2020-04-13 15:54:55 +01:00
midpoint-int-vec-256.ll
[X86] Improve combineVectorShiftImm
2020-04-13 15:54:55 +01:00
midpoint-int-vec-512.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
midpoint-int.ll
…
min-legal-vector-width.ll
[X86][AVX] combineVectorSignBitsTruncation - avoid complex vXi64->vXi32 PACKSS truncations (PR45794)
2020-05-05 11:57:25 +01:00
mingw-alloca.ll
…
mingw-comdats-xdata.ll
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
mingw-comdats.ll
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
mingw-refptr.ll
…
misaligned-memset.ll
…
misched_phys_reg_assign_order.ll
…
misched-aa-colored.ll
…
misched-aa-mmos.ll
…
misched-balance.ll
…
misched-code-difference-with-debug.ll
…
misched-copy.ll
…
misched-crash.ll
…
misched-fusion.ll
…
misched-ilp.ll
…
misched-matmul.ll
…
misched-matrix.ll
…
misched-new.ll
…
mixed-ptr-sizes.ll
…
mmx-arg-passing-x86-64.ll
…
mmx-arg-passing.ll
…
mmx-arith.ll
…
mmx-bitcast-fold.ll
…
mmx-bitcast.ll
…
mmx-build-vector.ll
…
mmx-coalescing.ll
…
mmx-copy-gprs.ll
…
mmx-cvt.ll
…
mmx-fold-load.ll
…
mmx-fold-zero.ll
…
mmx-intrinsics.ll
…
mmx-only.ll
…
mod128.ll
…
movbe.ll
…
movddup-load-fold.ll
…
movdir-intrinsic-x86_64.ll
…
movdir-intrinsic-x86.ll
…
move_latch_to_loop_top.ll
Revert "Include static prof data when collecting loop BBs"
2020-03-24 09:41:16 -07:00
movfs.ll
…
movgs.ll
…
movmsk-cmp.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
movmsk.ll
…
movntdq-no-avx.ll
…
movpc32-check.ll
…
movtopush64.ll
…
movtopush.ll
…
movtopush.mir
…
ms-inline-asm-avx512.ll
…
ms-inline-asm-PR44272.ll
…
ms-inline-asm-redundant-clobber.ll
…
ms-inline-asm.ll
…
mul64.ll
…
mul128_sext_loop.ll
…
mul128.ll
…
mul-constant-i8.ll
…
mul-constant-i16.ll
…
mul-constant-i32.ll
…
mul-constant-i64.ll
…
mul-constant-result.ll
…
mul-i256.ll
…
mul-i512.ll
…
mul-i1024.ll
…
mul-legalize.ll
…
mul-remat.ll
…
mul-shift-reassoc.ll
…
mulfix_combine.ll
…
mulo-pow2.ll
…
muloti.ll
…
mult-alt-generic-i686.ll
…
mult-alt-generic-x86_64.ll
…
mult-alt-x86.ll
…
multiple-loop-post-inc.ll
…
multiple-return-values-cross-block.ll
…
mulvi32.ll
…
mulx32.ll
…
mulx64.ll
…
musttail-fastcall.ll
…
musttail-inalloca.ll
…
musttail-indirect.ll
…
musttail-tailcc.ll
…
musttail-thiscall.ll
…
musttail-varargs.ll
…
musttail.ll
…
mwaitx.ll
…
mxcsr-reg-usage.ll
…
named-reg-alloc.ll
…
named-reg-notareg.ll
…
nancvt.ll
…
narrow_op-1.ll
…
narrow-shl-cst.ll
…
narrow-shl-load.ll
…
neg_cmp.ll
…
neg_fp.ll
…
neg-of-3ops-lea.ll
…
neg-shl-add.ll
…
negate-add-zero.ll
…
negate-i1.ll
…
negate-shift.ll
…
negate.ll
…
negative_zero.ll
…
negative-offset.ll
…
negative-sin.ll
…
negative-stride-fptosi-user.ll
…
negative-subscript.ll
…
new-remat.ll
…
newline-and-quote.ll
…
no-and8ri8.ll
…
no-cmov.ll
…
no-plt-libcalls.ll
…
no-plt.ll
…
no-prolog-kill.ll
…
no-sse2-avg.ll
…
no-sse-win64.ll
…
no-sse-x86.ll
…
no-stack-arg-probe.ll
…
nobt.ll
…
nocf_check.ll
…
nocx16.ll
…
nomovtopush.ll
…
non-lazy-bind.ll
…
non-unique-sections.ll
…
non-value-mem-operand.mir
…
nonconst-static-ev.ll
…
nonconst-static-iv.ll
…
nontemporal-2.ll
…
nontemporal-3.ll
…
nontemporal-loads-2.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
nontemporal-loads.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
nontemporal.ll
…
noreturn-call-linux.ll
…
noreturn-call-win64.ll
Re-land "Avoid emitting unreachable SP adjustments after throw"
2020-03-24 12:04:43 -07:00
noreturn-call.ll
…
norex-subreg.ll
…
nosse-error1.ll
…
nosse-varargs.ll
…
nosse-vector.ll
[SelectionDAG] Fix usage of Align constructing MachineMemOperands.
2020-04-15 13:01:41 -07:00
not-and-simplify.ll
…
not-of-dec.ll
…
note-cet-property.ll
…
note-sections.ll
…
null-streamer.ll
…
O0-pipeline.ll
Re-land [Codegen/Statepoint] Allow usage of registers for non gc deopt values.
2020-04-10 10:13:39 +07:00
O3-pipeline.ll
[BPI][NFC] Reuse post dominantor tree from analysis manager when available
2020-04-30 11:31:03 +07:00
objc-gc-module-flags.ll
…
oddshuffles.ll
[DAG] SimplifyDemandedVectorElts - add INSERT_SUBVECTOR SimplifyMultipleUseDemandedBits handling
2020-05-01 16:20:51 +01:00
oddsubvector.ll
[X86][SSE] Regenerate oddsubvector.ll test checks
2020-04-27 18:48:02 +01:00
offset-operator.ll
…
omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll
…
opaque-constant-asm.ll
…
opt_phis2.mir
…
opt_phis.mir
…
opt-ext-uses.ll
…
opt-shuff-tstore.ll
…
optimize-max-0.ll
…
optimize-max-1.ll
…
optimize-max-2.ll
…
optimize-max-3.ll
…
or-address.ll
…
or-branch.ll
…
or-lea.ll
…
osx-private-labels.ll
…
overflow-intrinsic-setcc-fold.ll
…
overflow.ll
…
overlap-shift.ll
…
packed_struct.ll
…
packss.ll
[TargetLowering] SimplifyDemandedVectorElts - add DemandedElts mask to ISD::BITCAST SimplifyDemandedBits call.
2020-03-10 13:39:10 +00:00
paddus.ll
…
palignr.ll
…
parity.ll
…
partial-fold32.ll
…
partial-fold64.ll
…
partial-tail-dup.ll
…
partition.ll
…
pass-three.ll
…
patchable-function-entry-ibt.ll
…
patchable-function-entry.ll
…
patchable-prologue.ll
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
patchpoint-invoke.ll
…
patchpoint-verifiable.mir
…
patchpoint-webkit_jscc.ll
…
patchpoint.ll
…
pause.ll
…
peep-setb.ll
…
peep-test-0.ll
…
peep-test-1.ll
…
peep-test-2.ll
…
peep-test-3.ll
…
peep-test-4.ll
…
peephole-cvt-sse.ll
…
peephole-fold-movsd.ll
…
peephole-fold-testrr.mir
…
peephole-multiple-folds.ll
…
peephole-na-phys-copy-folding.ll
…
peephole-recurrence.mir
…
peephole.mir
…
personality_size.ll
…
personality.ll
…
phaddsub-extract.ll
…
phaddsub-undef.ll
[X86][SSE] Combine unary shuffle(HORIZOP,HORIZOP) -> HORIZOP
2020-04-05 22:49:46 +01:00
phaddsub.ll
[X86][SSE] lowerV8I16Shuffle - lower compaction shuffles using PACKUSDW(PBLENDW,PBLENDW) on SSE41+
2020-04-04 13:08:25 +01:00
phi-bit-propagation.ll
…
phi-immediate-factoring.ll
…
phielim-split.ll
…
phys_subreg_coalesce-2.ll
…
phys_subreg_coalesce-3.ll
…
phys_subreg_coalesce.ll
…
phys-reg-local-regalloc.ll
…
physreg-pairs-error.ll
…
physreg-pairs.ll
…
pic_jumptable.ll
…
pic-load-remat.ll
…
pic.ll
…
pie.ll
…
pku.ll
…
pmaddubsw.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
pmovext.ll
…
pmovsx-inreg.ll
…
pmul.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
pmulh.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
pmulld.ll
…
pointer-vector.ll
…
pop-stack-cleanup-msvc.ll
…
pop-stack-cleanup.ll
…
popcnt.ll
…
post-ra-sched-with-debug.mir
…
post-ra-sched.ll
…
postalloc-coalescing.ll
…
postra-ignore-dbg-instrs.mir
…
postra-licm.ll
…
pow.75.ll
…
pow.ll
Assume ieee behavior without denormal-fp-math attribute
2020-03-07 12:10:56 -05:00
powi-windows.ll
…
powi.ll
…
pr1462.ll
…
pr1489.ll
…
pr1505.ll
…
pr1505b.ll
…
pr2177.ll
…
pr2182.ll
…
pr2326.ll
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pr2585.ll
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pr2656.ll
…
pr2659.ll
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pr2849.ll
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pr2924.ll
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pr2982.ll
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pr3154.ll
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pr3216.ll
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pr3241.ll
…
pr3243.ll
…
pr3244.ll
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pr3250.ll
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pr3317.ll
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pr3366.ll
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pr3457.ll
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pr3522.ll
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pr5145.ll
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pr7882.ll
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pr9127.ll
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pr9517.ll
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pr9743.ll
…
pr10068.ll
…
pr10475.ll
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pr10499.ll
…
pr10523.ll
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pr10524.ll
…
pr10525.ll
…
pr10526.ll
…
pr11202.ll
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pr11334.ll
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pr11415.ll
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pr11468.ll
Fix typo in comment
2020-04-09 10:36:00 +01:00
pr11985.ll
…
pr11998.ll
…
pr12360.ll
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pr12889.ll
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pr13209.ll
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pr13220.ll
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pr13458.ll
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pr13577.ll
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pr13859.ll
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pr13899.ll
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pr14088.ll
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pr14098.ll
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pr14161.ll
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pr14204.ll
…
pr14314.ll
…
pr14333.ll
…
pr14562.ll
…
pr15267.ll
[SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad
2020-05-02 15:18:10 -07:00
pr15296.ll
…
pr15309.ll
…
pr15705.ll
…
pr15981.ll
…
pr16031.ll
…
pr16360.ll
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pr16807.ll
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pr17546.ll
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pr17631.ll
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pr17764.ll
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pr18014.ll
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pr18054.ll
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pr18162.ll
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pr18344.ll
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pr18846.ll
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pr19049.ll
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pr20011.ll
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pr20012.ll
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pr20020.ll
…
pr20088.ll
…
pr21099.ll
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pr21792.ll
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pr22019.ll
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pr22103.ll
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pr22338.ll
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pr22473.ll
…
pr22774.ll
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pr22970.ll
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pr23103.ll
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pr23246.ll
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pr23273.ll
…
pr23603.ll
…
pr23664.ll
…
pr24139.ll
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pr24374.ll
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pr24602.ll
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pr25828.ll
…
pr26350.ll
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pr26625.ll
…
pr26652.ll
…
pr26757.ll
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pr26835.ll
…
pr26870.ll
…
pr27071.ll
…
pr27202.ll
…
pr27501.ll
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pr27591.ll
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pr27681.mir
…
pr28129.ll
…
pr28173.ll
…
pr28444.ll
…
pr28472.ll
…
pr28489.ll
…
pr28515.ll
…
pr28560.ll
…
pr28824.ll
…
pr29010.ll
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pr29022.ll
…
pr29061.ll
…
pr29112.ll
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pr29170.ll
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pr29222.ll
…
pr30284.ll
[X86] Always emit an integer vbroadcast_load from lowerBuildVectorAsBroadcast regardless of AVX vs AVX2
2020-03-03 10:39:11 -08:00
pr30290.ll
…
pr30430.ll
…
pr30511.ll
…
pr30562.ll
[TargetLowering] SimplifyDemandedVectorElts - add DemandedElts mask to ISD::BITCAST SimplifyDemandedBits call.
2020-03-10 13:39:10 +00:00
pr30813.ll
…
pr30821.mir
…
pr31045.ll
…
pr31088.ll
…
pr31143.ll
…
pr31242.ll
…
pr31271.ll
…
pr31323.ll
…
pr31593.ll
…
pr31773.ll
…
pr31956.ll
[X86][SSE] SimplifyDemandedVectorEltsForTargetNode - reduce vector width of X86ISD::BLENDI
2020-03-09 18:29:28 +00:00
pr32108.ll
…
pr32241.ll
…
pr32256.ll
…
pr32278.ll
…
pr32282.ll
[DAGCombine] Move the remaining X86 funnel shift patterns to DAGCombine
2020-04-30 12:57:17 +01:00
pr32284.ll
…
pr32329.ll
…
pr32340.ll
…
pr32345.ll
…
pr32368.ll
…
pr32420.ll
…
pr32451.ll
…
pr32484.ll
…
pr32515.ll
…
pr32588.ll
…
pr32610.ll
…
pr32659.ll
…
pr32907.ll
…
pr33010.ll
…
pr33290.ll
…
pr33349.ll
…
pr33396.ll
…
pr33715.ll
…
pr33747.ll
…
pr33828.ll
…
pr33954.ll
…
pr33960.ll
…
pr34080-2.ll
…
pr34080.ll
…
pr34088.ll
…
pr34137.ll
…
pr34139.ll
…
pr34149.ll
…
pr34177.ll
…
pr34271-1.ll
…
pr34271.ll
…
pr34292.ll
…
pr34381.ll
…
pr34397.ll
…
pr34421.ll
…
pr34592.ll
[X86][AVX] combineX86ShuffleChain - combine binary shuffles to X86ISD::VPERM2X128
2020-03-10 10:44:28 +00:00
pr34605.ll
…
pr34629.ll
…
pr34634.ll
…
pr34653.ll
[SelectionDAGBuilder] Stop setting alignment to one for hidden sret values
2020-05-04 14:44:39 +01:00
pr34657.ll
…
pr34855.ll
…
pr35272.ll
…
pr35316.ll
…
pr35399.ll
…
pr35443.ll
[X86] Don't count the chain uses when forming broadcast loads in lowerBuildVectorAsBroadcast.
2020-03-03 08:41:31 -08:00
pr35636.ll
…
pr35761.ll
…
pr35763.ll
…
pr35765.ll
…
pr35918.ll
…
pr35972.ll
…
pr35982.ll
…
pr36199.ll
…
pr36274.ll
…
pr36312.ll
…
pr36553.ll
…
pr36602.ll
…
pr36865.ll
…
pr37063.ll
…
pr37264.ll
…
pr37359.ll
…
pr37499.ll
…
pr37820.ll
…
pr37826.ll
…
pr37879.ll
…
pr37916.ll
…
pr38038.ll
…
pr38185.ll
…
pr38217.ll
…
pr38533.ll
…
pr38539.ll
…
pr38639.ll
…
pr38738.ll
…
pr38743.ll
…
pr38762.ll
…
pr38763.ll
…
pr38795.ll
…
pr38803.ll
…
pr38819.ll
…
pr38865-2.ll
…
pr38865-3.ll
…
pr38865.ll
…
pr38952.mir
…
pr39098.ll
…
pr39187-g.ll
…
pr39243.ll
…
pr39666.ll
…
pr39733.ll
…
pr39896.ll
…
pr39926.ll
…
pr40090.ll
…
pr40289-64bit.ll
…
pr40289.ll
…
pr40529.ll
…
pr40539.ll
…
pr40631_deadstore_elision.ll
[Codegen] Revert rL354676/rL354677 and followups - introduced PR43446 miscompile
2020-02-25 20:30:12 +03:00
pr40730.ll
…
pr40737.ll
…
pr40811.ll
…
pr40891.ll
[X86] Combine concat(shufps,shufps) -> shufps(concat,concat)
2020-03-21 12:44:10 +00:00
pr40994.ll
…
pr41619.ll
…
pr41678.ll
…
pr41748.ll
…
pr42452.ll
…
pr42565.ll
…
pr42616.ll
…
pr42727.ll
…
pr42870.ll
[X86][SSE1] Add support for logic+movmsk patterns (PR42870)
2020-03-24 14:28:40 +00:00
pr42905.ll
…
pr42909.ll
…
pr42992.ll
…
pr42998.ll
…
pr43157.ll
…
pr43507.ll
…
pr43509.ll
…
pr43529.ll
…
pr43575.ll
…
pr43820.ll
…
pr43866.ll
…
pr43952.ll
…
pr44140.ll
…
pr44396.ll
…
pr44412.ll
…
pr44749.ll
[DAGCombiner] Don't emit select_cc from visitSINT_TO_FP/visitUINT_TO_FP. Use plain select instead.
2020-03-01 10:52:17 -08:00
pr44812.ll
…
pr44976.ll
Recommit "[X86] Replace a bad use of MVT::getVectorVT with EVT::getVectorVT""
2020-02-20 12:28:54 -08:00
pr45067.ll
[SelectionDAGBuilder][CGP][X86] Move some of SDB's gather/scatter uniform base handling to CGP.
2020-04-16 17:49:22 -07:00
pr45443.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
pr45563-2.ll
[llvm] [CodeGen] Fixed vector halving bug for masked load
2020-04-23 15:12:44 -07:00
pr45563.ll
[llvm] [X86] Processed test with update_llc_test_checks
2020-04-23 15:09:53 -07:00
PR34565.ll
…
PR37310.mir
…
PR40322.ll
…
pre-coalesce-2.ll
…
pre-coalesce.ll
…
pre-coalesce.mir
…
pre-ra-sched.ll
…
prefer-avx256-lzcnt.ll
…
prefer-avx256-mask-extend.ll
…
prefer-avx256-mask-shuffle.ll
[X86] Improve lowering of v16i8->v16i1 truncate under prefer-vector-width=256.
2020-04-25 15:20:33 -07:00
prefer-avx256-popcnt.ll
…
prefer-avx256-shift.ll
…
prefer-avx256-trunc.ll
…
prefer-avx256-wide-mul.ll
…
prefetch.ll
…
prefixdata.ll
…
preserve_allcc64.ll
…
preserve_mostcc64.ll
…
private-2.ll
…
private.ll
…
probe-stack-x32.ll
…
prolog-push-seq.ll
…
prologepilog_deref_size.mir
…
prologue-epilogue-remarks.mir
…
prologuedata.ll
…
promote-assert-zext.ll
…
promote-i16.ll
…
promote-trunc.ll
…
promote-vec3.ll
…
promote.ll
…
ps4-noreturn.ll
…
ps4-ssp-nop.ll
…
psadbw.ll
[DAGCombine] visitEXTRACT_VECTOR_ELT - add SimplifyDemandedBits multi use support
2020-02-20 15:49:38 +00:00
pseudo_cmov_lower1.ll
…
pseudo_cmov_lower2.ll
…
pseudo_cmov_lower.ll
[X86] Don't bother avoiding illegal FCMOVs if we don't have the cmov subtarget feature.
2020-02-21 00:34:15 -08:00
pshufb-mask-comments.ll
[X86] Add DAG combine to replace vXi64 vzext_movl+scalar_to_vector with vYi32 vzext_movl+scalar_to_vector if the upper 32 bits of the scalar are zero.
2020-03-07 16:14:26 -08:00
pshufd-combine-crash.ll
…
psubus.ll
[X86][SSE] lowerV8I16Shuffle - lower compaction shuffles using PACKUSDW(PBLENDW,PBLENDW) on SSE41+
2020-04-04 13:08:25 +01:00
ptest.ll
…
ptr-rotate.ll
…
ptrtoint-constexpr.ll
…
ptrtoint-narrow.ll
…
ptwrite32-intrinsic.ll
…
ptwrite64-intrinsic.ll
…
pull-binop-through-shift.ll
…
pull-conditional-binop-through-shift.ll
…
push-cfi-debug.ll
…
push-cfi-obj.ll
…
push-cfi.ll
…
ragreedy-bug.ll
Revert "Include static prof data when collecting loop BBs"
2020-03-24 09:41:16 -07:00
ragreedy-hoist-spill.ll
…
ragreedy-last-chance-recoloring.ll
…
rd-mod-wr-eflags.ll
…
rdpid.ll
…
rdpmc.ll
…
rdrand-x86_64.ll
…
rdrand.ll
…
rdseed-x86_64.ll
…
rdseed.ll
…
rdtsc-upgrade.ll
…
rdtsc.ll
…
read-fp-no-frame-pointer.ll
…
recip-fastmath2.ll
[X86][TwoAddressInstructionPass] Teach tryInstructionCommute to continue checking for commutable FMA operands in more cases.
2020-03-01 16:38:08 -08:00
recip-fastmath.ll
[X86][TwoAddressInstructionPass] Teach tryInstructionCommute to continue checking for commutable FMA operands in more cases.
2020-03-01 16:38:08 -08:00
recip-pic.ll
…
red-zone2.ll
…
red-zone.ll
…
reduce-trunc-shl.ll
…
regalloc-advanced-split-cost.ll
…
regalloc-copy-hints.mir
…
regalloc-fast-missing-live-out-spill.mir
…
regalloc-reconcile-broken-hints.ll
…
regalloc-spill-at-ehpad.ll
…
regcall-no-plt.ll
…
reghinting.ll
…
regparm.ll
…
regpressure.ll
…
relptr-rodata.ll
…
rem_crash.ll
…
rem.ll
…
remarks-section.ll
…
remat-constant.ll
…
remat-fold-load.ll
…
remat-mov-0.ll
…
remat-phys-dead.ll
…
remat-scalar-zero.ll
…
replace_unsupported_masked_mem_intrin.ll
…
replace-load-and-with-bzhi.ll
…
ret-addr.ll
…
ret-i64-0.ll
…
ret-mmx.ll
…
retpoline-external.ll
…
retpoline-regparm.ll
…
retpoline.ll
…
return_zeroext_i2.ll
…
return-ext.ll
…
returned-trunc-tail-calls.ll
…
rev16.ll
…
reverse_branches.ll
…
rip-rel-address.ll
…
rip-rel-lea.ll
…
rodata-relocs.ll
…
rot16.ll
…
rot32.ll
…
rot64.ll
…
rotate2.ll
…
rotate4.ll
…
rotate_vec.ll
[X86] Run XOP vector rotation tests with/without AVX2
2020-04-01 08:19:03 +01:00
rotate-extract-vector.ll
…
rotate-extract.ll
…
rotate-multi.ll
…
rotate.ll
…
rounding-ops.ll
…
rrlist-livereg-corrutpion.ll
…
rtm.ll
…
sad_variations.ll
…
sad.ll
[X86] Use more accurate increments for the induction variables in sad.ll. NFC
2020-05-01 18:55:22 -07:00
sadd_sat_plus.ll
…
sadd_sat_vec.ll
[SelectionDAG] Fix usage of Align constructing MachineMemOperands.
2020-04-15 13:01:41 -07:00
sadd_sat.ll
…
saddo-redundant-add.ll
…
safestack_inline.ll
…
safestack_ssp.ll
…
safestack.ll
…
sandybridge-loads.ll
…
sar_fold64.ll
…
sar_fold.ll
…
sat-add.ll
Recommit "[PatternMatch] Match XOR variant of unsigned-add overflow check."
2020-02-23 18:33:18 +00:00
sbb.ll
[X86] Handle more cases in combineAddOrSubToADCOrSBB.
2020-04-28 10:39:39 -07:00
scalar_sse_minmax.ll
…
scalar_widen_div.ll
[X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0)
2020-03-13 18:43:04 +00:00
scalar-extract.ll
…
scalar-fp-to-i32.ll
…
scalar-fp-to-i64.ll
…
scalar-int-to-fp.ll
…
scalar-min-max-fill-operand.ll
…
scalarize-bitcast.ll
…
scalarize-fp.ll
…
scatter-schedule.ll
…
scavenger.mir
[llvm] Fix missing FileCheck directive colons
2020-04-06 09:59:08 -06:00
scev-interchange.ll
…
scheduler-backtracking.ll
[X86] Handle more cases in combineAddOrSubToADCOrSBB.
2020-04-28 10:39:39 -07:00
sdiv_fix_sat.ll
[DAG] MatchRotate - Add funnel shift by immediate support
2020-03-11 18:55:18 +00:00
sdiv_fix.ll
[DAG] MatchRotate - Add funnel shift by immediate support
2020-03-11 18:55:18 +00:00
sdiv-exact.ll
…
sdiv-pow2.ll
…
section_mergeable_size.ll
…
segmented-stacks-dynamic.ll
…
segmented-stacks-standalone.ll
…
segmented-stacks.ll
…
seh-catch-all-win32.ll
…
seh-catch-all.ll
…
seh-catchpad.ll
…
seh-except-finally.ll
…
seh-except-restore.ll
…
seh-exception-code.ll
…
seh-filter-no-personality.ll
…
seh-finally.ll
…
seh-localaddress.ll
…
seh-no-invokes.ll
…
seh-safe-div-win32.ll
…
seh-safe-div.ll
…
seh-stack-realign.ll
…
select_const.ll
…
select_meta.ll
…
select-1-or-neg1.ll
…
select-mmx.ll
[X86] Add CMOV_VR64 pseudo instruction for MMX. Remove mmx handling from combineSelect.
2020-02-20 20:30:56 -08:00
select-of-fp-constants.ll
…
select-sra.ll
…
select-testb-volatile-load.ll
…
select-with-and-or.ll
…
select.ll
[X86] Handle more cases in combineAddOrSubToADCOrSBB.
2020-04-28 10:39:39 -07:00
selectcc-to-shiftand.ll
…
selectiondag-crash.ll
…
selectiondag-cse.ll
…
selectiondag-debug-loc.ll
…
selectiondag-dominator.ll
…
selectiondag-order.ll
…
semantic-interposition-asm.ll
…
semantic-interposition-comdat.ll
[AsmPrinter] Do not define local aliases for global objects in a comdat
2020-04-06 13:48:05 -07:00
serialize-intrinsic.ll
[X86] Add SERIALIZE instruction.
2020-04-02 16:19:23 +08:00
setcc-combine.ll
…
setcc-logic.ll
…
setcc-lowering.ll
…
setcc-narrowing.ll
…
setcc-wide-types.ll
…
setcc.ll
…
setjmp-spills.ll
…
setoeq.ll
[x86] use vector instructions to lower more FP->int->FP casts
2020-04-19 08:33:17 -04:00
setuge.ll
…
sext-i1.ll
…
sext-load.ll
…
sext-ret-val.ll
…
sext-setcc-self.ll
…
sext-subreg.ll
…
sext-trunc.ll
…
sha.ll
…
shadow-stack.ll
…
shift_minsize.ll
…
shift-amount-mod.ll
…
shift-and-x86_64.ll
…
shift-and.ll
…
shift-avx2-crash.ll
…
shift-bmi2.ll
…
shift-by-signext.ll
[TargetLowering] Only demand a funnelshift's modulo amount bits
2020-03-16 13:52:17 +00:00
shift-coalesce.ll
…
shift-codegen.ll
…
shift-combine-crash.ll
…
shift-combine.ll
[X86] Don't return true from isTruncateFree for vectors
2020-04-30 16:43:35 -07:00
shift-double-x86_64.ll
[DAG] MatchRotate - Add funnel shift by variable support
2020-03-15 11:50:45 +00:00
shift-double.ll
[DAG] MatchRotate - Add funnel shift by variable support
2020-03-15 11:50:45 +00:00
shift-folding.ll
…
shift-i128.ll
…
shift-i256.ll
…
shift-logic.ll
…
shift-mask.ll
…
shift-one.ll
…
shift-pair.ll
…
shift-parts.ll
[X86] Replace (most) X86ISD::SHLD/SHRD usage with ISD::FSHL/FSHR generic opcodes (PR39467)
2020-03-11 11:17:49 +00:00
shift-pcmp.ll
…
shl_elim.ll
…
shl_undef.ll
…
shl-anyext.ll
…
shl-crash-on-legalize.ll
…
shl-i64.ll
…
shrink_vmul_sse.ll
…
shrink_vmul.ll
[TargetLowering] SimplifyDemandedVectorElts - add DemandedElts mask to ISD::BITCAST SimplifyDemandedBits call.
2020-03-10 13:39:10 +00:00
shrink_wrap_dbg_value.mir
…
shrink-compare-pgso.ll
…
shrink-compare.ll
…
shrink-fp-const1.ll
…
shrink-fp-const2.ll
…
shrink-wrap-chkstk-x86_64.ll
…
shrink-wrap-chkstk.ll
…
shrink-wrapping-vla.ll
…
shrinkwrap-hang.ll
…
shuffle-combine-crash-2.ll
…
shuffle-combine-crash-3.ll
[X86] Do not assume types are legal in getFauxShuffleMask
2020-04-01 11:40:18 +02:00
shuffle-combine-crash.ll
…
shuffle-extract-subvector.ll
…
shuffle-of-insert.ll
…
shuffle-of-splat-multiuses.ll
…
shuffle-strided-with-offset-128.ll
…
shuffle-strided-with-offset-256.ll
…
shuffle-strided-with-offset-512.ll
…
shuffle-vs-trunc-128.ll
[X86][AVX] Combine shuffles to TRUNCATE/VTRUNC patterns
2020-03-25 17:41:51 +00:00
shuffle-vs-trunc-256.ll
[X86][SSE] Combine unary shuffle(HORIZOP,HORIZOP) -> HORIZOP
2020-04-05 22:49:46 +01:00
shuffle-vs-trunc-512.ll
[X86][SSE] Generalize shuffle(HORIZOP,HORIZOP) -> HORIZOP combine
2020-04-05 12:09:19 +01:00
sibcall-2.ll
…
sibcall-3.ll
…
sibcall-4.ll
…
sibcall-5.ll
…
sibcall-6.ll
…
sibcall-byval.ll
…
sibcall-win64.ll
…
sibcall.ll
…
signbit-shift.ll
…
signed-truncation-check.ll
…
simple-register-allocation-read-undef.mir
…
simple-zext.ll
…
sincos-opt.ll
…
sincos.ll
…
sink-addsub-of-const.ll
…
sink-blockfreq.ll
…
sink-cheap-instructions.ll
…
sink-gep-before-mem-inst.ll
…
sink-hoist.ll
…
sink-local-value.ll
[CodeGen] Fix sinking local values in lpads with phis
2020-03-28 11:10:33 -07:00
sink-out-of-loop.ll
…
sitofp.ll
…
sjlj-baseptr.ll
…
sjlj-eh.ll
…
sjlj-shadow-stack-liveness.mir
…
sjlj.ll
…
slow-incdec.ll
…
slow-pmulld.ll
…
slow-unaligned-mem.ll
…
small-byval-memcpy.ll
…
smul_fix_sat_constants.ll
…
smul_fix_sat.ll
…
smul_fix.ll
…
smul-with-overflow.ll
…
soft-fp-legal-in-HW-reg.ll
[X86] Regenerate soft fp legalization test to fix issue reported on D77354
2020-04-03 14:56:07 +01:00
soft-fp.ll
…
soft-sitofp.ll
…
speculative-load-hardening-call-and-ret.ll
…
speculative-load-hardening-gather.ll
…
speculative-load-hardening-indirect.ll
Revert "Reland "[DebugInfo] Enable the debug entry values feature by default""
2020-02-20 14:41:39 +01:00
speculative-load-hardening.ll
…
splat-const.ll
…
splat-for-size.ll
…
split-eh-lpad-edges.ll
…
split-extend-vector-inreg.ll
…
split-store.ll
…
split-vector-bitcast.ll
…
split-vector-rem.ll
…
sqrt-fastmath-mir.ll
[DAGCombiner] Require ninf for sqrt recip estimation
2020-04-01 16:23:43 +08:00
sqrt-fastmath-tune.ll
[Legalizer] Fix some flags miss in vector results
2020-03-26 22:01:19 +08:00
sqrt-fastmath.ll
[DAGCombiner] Require ninf for sqrt recip estimation
2020-04-01 16:23:43 +08:00
sqrt-partial.ll
…
sqrt.ll
…
srem-lkk.ll
…
srem-seteq-optsize.ll
…
srem-seteq-vec-nonsplat.ll
…
srem-seteq-vec-splat.ll
…
srem-seteq.ll
…
srem-vector-lkk.ll
…
sret-implicit.ll
…
sse1-fcopysign.ll
…
sse1.ll
…
sse2-intrinsics-canonical.ll
…
sse2-intrinsics-fast-isel-x86_64.ll
…
sse2-intrinsics-fast-isel.ll
…
sse2-intrinsics-x86_64-upgrade.ll
…
sse2-intrinsics-x86_64.ll
…
sse2-intrinsics-x86-upgrade.ll
[X86] Enable shuffle combining for AVX512 unless the root is used by a vselect
2020-04-11 20:05:10 -07:00
sse2-intrinsics-x86.ll
…
sse2-vector-shifts.ll
…
sse2.ll
…
sse3-avx-addsub-2.ll
…
sse3-avx-addsub.ll
…
sse3-intrinsics-fast-isel.ll
…
sse3-intrinsics-x86.ll
…
sse3.ll
[TargetLowering] SimplifyDemandedBits - fix SCALAR_TO_VECTOR knownbits bug
2020-02-28 15:23:37 +00:00
sse4a-intrinsics-fast-isel.ll
…
sse4a-upgrade.ll
…
sse4a.ll
…
sse41-intrinsics-fast-isel.ll
…
sse41-intrinsics-x86-upgrade.ll
…
sse41-intrinsics-x86.ll
…
sse41-pmovxrm.ll
…
sse41.ll
[X86] Enable shuffle combining for AVX512 unless the root is used by a vselect
2020-04-11 20:05:10 -07:00
sse42-intrinsics-fast-isel-x86_64.ll
…
sse42-intrinsics-fast-isel.ll
…
sse42-intrinsics-x86_64.ll
…
sse42-intrinsics-x86.ll
…
sse_partial_update.ll
…
sse_reload_fold.ll
…
sse-align-0.ll
…
sse-align-1.ll
…
sse-align-2.ll
…
sse-align-3.ll
…
sse-align-4.ll
…
sse-align-5.ll
…
sse-align-6.ll
…
sse-align-7.ll
…
sse-align-8.ll
…
sse-align-9.ll
…
sse-align-10.ll
…
sse-align-11.ll
…
sse-align-12.ll
…
sse-commute.ll
…
sse-cvttp2si.ll
…
sse-domains.ll
…
sse-fcopysign.ll
…
sse-fsignum.ll
…
sse-intel-ocl.ll
…
sse-intrinsics-fast-isel-x86_64.ll
…
sse-intrinsics-fast-isel.ll
Revert rGe6a7e3b5e3e7 "[X86][SSE] matchShuffleWithSHUFPD - add support for unary shuffles."
2020-03-21 12:14:19 +00:00
sse-intrinsics-x86_64-upgrade.ll
…
sse-intrinsics-x86_64.ll
…
sse-intrinsics-x86-upgrade.ll
…
sse-intrinsics-x86.ll
…
sse-load-ret.ll
…
sse-minmax.ll
…
sse-only.ll
…
sse-regcall.ll
…
sse-scalar-fp-arith-unary.ll
…
sse-scalar-fp-arith.ll
…
sse-unaligned-mem-feature.ll
…
sse-varargs.ll
…
ssp-data-layout.ll
…
ssp-guard-spill.ll
…
ssse3-intrinsics-fast-isel.ll
…
ssse3-intrinsics-x86.ll
…
ssub_sat_plus.ll
…
ssub_sat_vec.ll
[SelectionDAG] Fix usage of Align constructing MachineMemOperands.
2020-04-15 13:01:41 -07:00
ssub_sat.ll
…
stack_guard_remat.ll
…
stack-align2.ll
…
stack-align-memcpy.ll
…
stack-align.ll
…
stack-clash-dynamic-alloca.ll
…
stack-clash-large.ll
…
stack-clash-medium-natural-probes-mutliple-objects.ll
[X86] Regenerate stack clash test to fix issue reported on D77354
2020-04-03 14:56:06 +01:00
stack-clash-medium-natural-probes.ll
…
stack-clash-medium.ll
…
stack-clash-no-free-probe.ll
…
stack-clash-small.ll
…
stack-clash-unknown-call.ll
…
stack-folding-3dnow.ll
…
stack-folding-adx-x86_64.ll
…
stack-folding-adx.mir
[X86] Clean up some mir tests with INLINEASM to avoid regdef or to correct the immediate for the regdef.
2020-04-17 21:55:44 -07:00
stack-folding-avx512bf16.ll
[X86] Assign avx512bf16 instructions to the SSEPackedSingle ExeDomain.
2020-03-16 14:07:01 -07:00
stack-folding-avx512vp2intersect.ll
…
stack-folding-bmi2.ll
…
stack-folding-bmi2.mir
[X86] Clean up some mir tests with INLINEASM to avoid regdef or to correct the immediate for the regdef.
2020-04-17 21:55:44 -07:00
stack-folding-bmi.ll
…
stack-folding-fp-avx1.ll
…
stack-folding-fp-avx512.ll
…
stack-folding-fp-avx512vl.ll
…
stack-folding-fp-nofpexcept.mir
[X86] Clean up some mir tests with INLINEASM to avoid regdef or to correct the immediate for the regdef.
2020-04-17 21:55:44 -07:00
stack-folding-fp-sse42.ll
…
stack-folding-int-avx1.ll
…
stack-folding-int-avx2.ll
…
stack-folding-int-avx512.ll
…
stack-folding-int-avx512vl.ll
…
stack-folding-int-avx512vnni.ll
…
stack-folding-int-sse42.ll
…
stack-folding-lwp.ll
…
stack-folding-mmx.ll
…
stack-folding-sha.ll
…
stack-folding-tbm.ll
…
stack-folding-x86_64.ll
…
stack-folding-xop.ll
…
stack-guard-oob.ll
[StackProtector] Catch direct out-of-bounds when checking address-takenness
2020-03-17 12:09:07 +00:00
stack-probe-red-zone.ll
…
stack-probe-size.ll
…
stack-probes.ll
…
stack-protector-2.ll
…
stack-protector-dbginfo.ll
…
stack-protector-msvc.ll
…
stack-protector-remarks.ll
…
stack-protector-strong-macho-win32-xor.ll
…
stack-protector-target.ll
…
stack-protector-vreg-to-vreg-copy.ll
…
stack-protector-weight.ll
…
stack-protector.ll
…
stack-size-section-function-sections.ll
…
stack-size-section.ll
…
stack-update-frame-opcode.ll
…
StackColoring-dbg.ll
…
StackColoring.ll
…
stackguard-internal.ll
…
stackmap-fast-isel.ll
…
stackmap-frame-setup.ll
…
stackmap-large-constants.ll
…
stackmap-large-location-size.ll
…
stackmap-liveness.ll
…
stackmap-nops.ll
…
stackmap-shadow-optimization.ll
…
stackmap.ll
…
stackpointer.ll
…
statepoint-allocas.ll
Revert "Reland "[DebugInfo] Enable the debug entry values feature by default""
2020-02-20 14:41:39 +01:00
statepoint-call-lowering.ll
…
statepoint-duplicates-export.ll
[GC] Loosen ordering on statepoint reloads to allow CSE
2020-03-11 12:30:06 -07:00
statepoint-far-call.ll
…
statepoint-forward.ll
…
statepoint-gctransition-call-lowering.ll
…
statepoint-invoke.ll
…
statepoint-live-in-remat.ll
[InlineSpiller] Relax re-materialization restriction for statepoint
2020-03-02 11:25:44 +07:00
statepoint-live-in.ll
…
statepoint-no-extra-const.ll
Remove the additional constant which requires an extra register for statepoint lowering.
2020-04-05 11:22:09 -04:00
statepoint-no-realign-stack.ll
…
statepoint-regs.ll
Re-land [Codegen/Statepoint] Allow usage of registers for non gc deopt values.
2020-04-10 10:13:39 +07:00
statepoint-stack-usage.ll
…
statepoint-stackmap-format.ll
…
statepoint-stackmap-size.ll
[test][NFC] Use plain FileCheck in statepoint-stackmap-size.ll
2020-04-14 20:53:41 -04:00
statepoint-uniqueing.ll
…
statepoint-vector-bad-spill.ll
…
statepoint-vector.ll
…
stdarg.ll
…
stdcall-notailcall.ll
…
stdcall.ll
…
store_op_load_fold2.ll
…
store_op_load_fold.ll
…
store-empty-member.ll
…
store-fp-constant.ll
…
store-global-address.ll
…
store-narrow.ll
…
store-zero-and-minus-one.ll
…
stores-merging.ll
[Codegen] Revert rL354676/rL354677 and followups - introduced PR43446 miscompile
2020-02-25 20:30:12 +03:00
storetrunc-fp.ll
…
stride-nine-with-base-reg.ll
…
stride-reuse.ll
…
sttni.ll
…
sub-of-bias.ll
…
sub-of-not.ll
…
sub-with-overflow.ll
…
sub.ll
…
subcarry.ll
…
subreg-to-reg-0.ll
…
subreg-to-reg-1.ll
…
subreg-to-reg-2.ll
…
subreg-to-reg-3.ll
…
subreg-to-reg-4.ll
…
subreg-to-reg-6.ll
…
subvector-broadcast.ll
…
sunkaddr-ext.ll
…
swap.ll
…
swift-error.ll
…
swift-return.ll
…
swiftcc.ll
…
swifterror.ll
…
swiftself.ll
…
switch-bt.ll
…
switch-crit-edge-constant.ll
…
switch-default-only.ll
…
switch-density.ll
…
switch-edge-weight.ll
…
switch-jump-table.ll
…
switch-lower-peel-top-case.ll
…
switch-or.ll
…
switch-order-weight.ll
…
switch-zextload.ll
…
switch.ll
…
SwitchLowering.ll
…
swizzle-2.ll
…
swizzle-avx2.ll
…
SwizzleShuff.ll
…
system-intrinsics-64-xsave.ll
…
system-intrinsics-64-xsavec.ll
…
system-intrinsics-64-xsaveopt.ll
…
system-intrinsics-64-xsaves.ll
…
system-intrinsics-64.ll
…
system-intrinsics-xgetbv.ll
…
system-intrinsics-xsave.ll
…
system-intrinsics-xsavec.ll
…
system-intrinsics-xsaveopt.ll
…
system-intrinsics-xsaves.ll
…
system-intrinsics-xsetbv.ll
…
system-intrinsics.ll
…
tail-call-attrs.ll
…
tail-call-casts.ll
…
tail-call-conditional.mir
…
tail-call-deref.ll
…
tail-call-got.ll
…
tail-call-legality.ll
…
tail-call-mutable-memarg.ll
…
tail-call-parameter-attrs-mismatch.ll
…
tail-call-win64.ll
…
tail-dup-addr.ll
…
tail-dup-catchret.ll
…
tail-dup-debugloc.ll
…
tail-dup-merge-loop-headers.ll
…
tail-dup-no-other-successor.ll
…
tail-dup-partial.ll
[CodeGen] Allow partial tail duplication in Machine Block Placement.
2020-04-11 12:20:31 -07:00
tail-dup-repeat.ll
Revert "Reland "[DebugInfo] Enable the debug entry values feature by default""
2020-02-20 14:41:39 +01:00
tail-merge-after-mbp.mir
…
tail-merge-debugloc.ll
…
tail-merge-identical.ll
…
tail-merge-unreachable.ll
…
tail-merge-wineh.ll
…
tail-opts.ll
…
tail-threshold.ll
…
tailcall-64.ll
…
tailcall-assume.ll
…
tailcall-calleesave.ll
…
tailcall-cgp-dup.ll
…
tailcall-disable.ll
…
tailcall-extract.ll
[CodeGenPrepare] Handle ExtractValueInst in dupRetToEnableTailCallOpts
2020-03-04 11:10:32 -08:00
tailcall-fastisel.ll
…
tailcall-largecode.ll
…
tailcall-lifetime-end.ll
…
tailcall-mem-intrinsics.ll
…
tailcall-msvc-conventions.ll
…
tailcall-multiret.ll
…
tailcall-pseudo-64.mir
…
tailcall-pseudo.mir
…
tailcall-readnone.ll
…
tailcall-returndup-void.ll
…
tailcall-ri64.ll
…
tailcall-stackalign.ll
…
tailcall-structret.ll
…
tailcall-tailcc.ll
…
tailcall.ll
…
tailcallbyval64.ll
…
tailcallbyval.ll
…
tailcallfp2.ll
…
tailcallfp.ll
…
tailcallpic1.ll
…
tailcallpic2.ll
…
tailcallpic3.ll
…
tailcallstack64.ll
…
tailcc-calleesave.ll
…
tailcc-disable-tail-calls.ll
…
tailcc-fastcc.ll
…
tailcc-fastisel.ll
…
tailcc-largecode.ll
…
tailcc-stackalign.ll
…
tailcc-structret.ll
…
tailccbyval64.ll
…
tailccbyval.ll
…
tailccfp2.ll
…
tailccfp.ll
…
tailccpic1.ll
…
tailccpic2.ll
…
tailccstack64.ll
…
taildup-callsiteinfo.mir
MachineFunction: Copy call site info when duplicating insts
2020-04-08 11:06:14 -07:00
taildup-crash.ll
…
taildup-heapallocsite.ll
…
tailjmp_gotpcrel_relax_relocation.ll
…
targetLoweringGeneric.ll
…
tbm_patterns.ll
…
tbm-intrinsics-fast-isel-x86_64.ll
…
tbm-intrinsics-fast-isel.ll
…
tbm-intrinsics-x86_64.ll
…
tbm-intrinsics.ll
…
test_x86condbr_globaladdr.mir
…
test-nofold.ll
…
test-shrink-bug.ll
…
test-shrink.ll
…
test-vs-bittest.ll
…
testb-je-fusion.ll
…
testl-commute.ll
…
this-return-64.ll
…
throws-cfi-fp.ll
…
throws-cfi-no-fp.ll
…
tls-addr-non-leaf-function.ll
…
tls-android-negative.ll
…
tls-android.ll
…
tls-local-dynamic.ll
…
tls-models.ll
…
tls-no-plt.ll
…
tls-pic.ll
…
tls-pie.ll
…
tls-shrink-wrapping.ll
…
tls-windows-itanium.ll
…
tls.ll
…
tlv-1.ll
…
tlv-2.ll
…
tlv-3.ll
…
token_landingpad.ll
…
trap.ll
…
tree_way_unsigned_cmp.ll
…
trunc-and.ll
…
trunc-ext-ld-st.ll
…
trunc-store.ll
…
trunc-subvector.ll
…
trunc-to-bool.ll
…
TruncAssertSext.ll
…
TruncAssertZext.ll
…
tsxldtrk-intrinsic.ll
[X86] Add TSXLDTRK instructions.
2020-04-09 13:17:29 +08:00
twoaddr-coalesce-2.ll
…
twoaddr-coalesce-3.ll
…
twoaddr-coalesce.ll
…
twoaddr-dbg-value.mir
…
twoaddr-lea.ll
…
twoaddr-pass-sink.ll
…
twoaddr-sink-terminator.ll
…
typeid-alias.ll
…
uadd_sat_plus.ll
…
uadd_sat_vec.ll
[SelectionDAG] Fix usage of Align constructing MachineMemOperands.
2020-04-15 13:01:41 -07:00
uadd_sat.ll
…
udiv_fix_sat.ll
[DAG] MatchRotate - Add funnel shift by immediate support
2020-03-11 18:55:18 +00:00
udiv_fix.ll
…
uint64-to-float.ll
…
uint_to_fp-2.ll
…
uint_to_fp-3.ll
…
uint_to_fp.ll
…
umul_fix_sat.ll
…
umul_fix.ll
…
umul-with-carry.ll
…
umul-with-overflow.ll
…
umulo-64-legalisation-lowering.ll
…
umulo-128-legalisation-lowering.ll
…
unaligned-32-byte-memops.ll
…
unaligned-load.ll
…
unaligned-spill-folding.ll
…
undef-eflags.mir
…
undef-globals-bss.ll
…
undef-label.ll
…
undef-ops.ll
…
unfold-masked-merge-scalar-constmask-innerouter.ll
…
unfold-masked-merge-scalar-constmask-interleavedbits.ll
…
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
…
unfold-masked-merge-scalar-constmask-lowhigh.ll
…
unfold-masked-merge-scalar-variablemask.ll
…
unfold-masked-merge-vector-variablemask-const.ll
…
unfold-masked-merge-vector-variablemask.ll
…
unknown-location.ll
…
unreachable-loop-sinking.ll
…
unreachable-mbb-undef-phi.mir
…
unreachable-trap.ll
…
unreachableblockelim.ll
…
unused_stackslots.ll
…
unwind-init.ll
…
unwindraise.ll
…
update-terminator-debugloc.ll
…
update-terminator.mir
…
urem-i8-constant.ll
…
urem-lkk.ll
…
urem-power-of-two.ll
…
urem-seteq-nonzero.ll
…
urem-seteq-optsize.ll
…
urem-seteq-vec-nonsplat.ll
…
urem-seteq-vec-nonzero.ll
…
urem-seteq-vec-splat.ll
…
urem-seteq-vec-tautological.ll
…
urem-seteq.ll
…
urem-vector-lkk.ll
…
use-add-flags.ll
…
use-cr-result-of-dom-icmp-st.ll
…
usub_sat_plus.ll
…
usub_sat_vec.ll
[SelectionDAG] Fix usage of Align constructing MachineMemOperands.
2020-04-15 13:01:41 -07:00
usub_sat.ll
…
utf8.ll
…
utf16-cfstrings.ll
…
uwtables.ll
…
v2f32.ll
…
v4f32-immediate.ll
…
v4i32load-crash.ll
…
v8i1-masks.ll
…
vaargs.ll
…
vaes-intrinsics-avx512-x86.ll
…
vaes-intrinsics-avx512vl-x86.ll
…
vaes-intrinsics-avx-x86.ll
…
var-permute-128.ll
[X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0)
2020-03-13 18:43:04 +00:00
var-permute-256.ll
[X86] getTargetShuffleAndZeroables - add insert_subvector(undef, sub, c) handling.
2020-03-21 19:11:42 +00:00
var-permute-512.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vararg_no_start.ll
…
vararg_tailcall.ll
…
vararg-callee-cleanup.ll
…
variable-sized-darwin-bzero.ll
…
variadic-node-pic.ll
…
vastart-defs-eflags.ll
…
vbinop-simplify-bug.ll
…
vec3.ll
…
vec_align_i256.ll
…
vec_align.ll
…
vec_anyext.ll
…
vec_call.ll
…
vec_cast2.ll
[X86][SSE] lowerShuffleWithPACK - extend to use chained PACKs for larger truncations
2020-04-03 18:26:10 +01:00
vec_cast3.ll
…
vec_cast.ll
…
vec_cmp_sint-128.ll
…
vec_cmp_uint-128.ll
…
vec_compare-sse4.ll
…
vec_compare.ll
…
vec_ctbits.ll
…
vec_ext_inreg.ll
…
vec_extract-avx.ll
…
vec_extract-mmx.ll
…
vec_extract-sse4.ll
…
vec_extract.ll
…
vec_fabs.ll
…
vec_floor.ll
…
vec_fneg.ll
[SDAG] fold fsub -0.0, undef to undef rather than NaN
2020-02-23 11:36:53 -05:00
vec_fp_to_int.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vec_fpext.ll
…
vec_fptrunc.ll
…
vec_i64.ll
…
vec_ins_extract-1.ll
…
vec_ins_extract.ll
…
vec_insert-2.ll
…
vec_insert-3.ll
…
vec_insert-4.ll
…
vec_insert-5.ll
…
vec_insert-7.ll
…
vec_insert-8.ll
…
vec_insert-9.ll
…
vec_insert-mmx.ll
…
vec_int_to_fp.ll
[X86] Enable shuffle combining for AVX512 unless the root is used by a vselect
2020-04-11 20:05:10 -07:00
vec_loadsingles.ll
…
vec_logical.ll
…
vec_minmax_match.ll
[ValueTracking] enhance matching of umin/umax with 'not' operands
2020-04-06 11:51:59 -04:00
vec_minmax_sint.ll
…
vec_minmax_uint.ll
…
vec_partial.ll
…
vec_reassociate.ll
…
vec_return.ll
…
vec_saddo.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vec_sdiv_to_shift.ll
…
vec_set-2.ll
…
vec_set-3.ll
…
vec_set-4.ll
…
vec_set-6.ll
…
vec_set-7.ll
…
vec_set-8.ll
…
vec_set-A.ll
[X86] Add DAG combine to replace vXi64 vzext_movl+scalar_to_vector with vYi32 vzext_movl+scalar_to_vector if the upper 32 bits of the scalar are zero.
2020-03-07 16:14:26 -08:00
vec_set-B.ll
[X86] Add DAG combine to replace vXi64 vzext_movl+scalar_to_vector with vYi32 vzext_movl+scalar_to_vector if the upper 32 bits of the scalar are zero.
2020-03-07 16:14:26 -08:00
vec_set-C.ll
…
vec_set-D.ll
…
vec_set-F.ll
…
vec_set-H.ll
…
vec_set.ll
…
vec_setcc-2.ll
…
vec_setcc.ll
…
vec_shift2.ll
…
vec_shift3.ll
…
vec_shift4.ll
…
vec_shift5.ll
…
vec_shift6.ll
…
vec_shift7.ll
…
vec_shift.ll
…
vec_shuf-insert.ll
…
vec_smulo.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vec_split.ll
…
vec_ss_load_fold.ll
…
vec_ssubo.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vec_trunc_sext.ll
…
vec_uaddo.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vec_uint_to_fp-fastmath.ll
…
vec_uint_to_fp.ll
…
vec_umulo.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vec_unsafe-fp-math.ll
…
vec_usubo.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vec_zero_cse.ll
…
vec_zero-2.ll
…
vec_zero.ll
…
vec-copysign-avx512.ll
…
vec-copysign.ll
…
vec-libcalls.ll
…
vec-loadsingles-alignment.ll
…
vec-strict-128.ll
…
vec-strict-256.ll
…
vec-strict-512.ll
…
vec-strict-cmp-128.ll
…
vec-strict-cmp-256.ll
…
vec-strict-cmp-512.ll
…
vec-strict-cmp-sub128.ll
…
vec-strict-fptoint-128.ll
[X86][SSE] lowerShuffleWithPACK - extend to use chained PACKs for larger truncations
2020-04-03 18:26:10 +01:00
vec-strict-fptoint-256.ll
[X86][SSE] lowerShuffleWithPACK - extend to use chained PACKs for larger truncations
2020-04-03 18:26:10 +01:00
vec-strict-fptoint-512.ll
…
vec-strict-inttofp-128.ll
[X86] Enable shuffle combining for AVX512 unless the root is used by a vselect
2020-04-11 20:05:10 -07:00
vec-strict-inttofp-256.ll
[X86] Enable shuffle combining for AVX512 unless the root is used by a vselect
2020-04-11 20:05:10 -07:00
vec-strict-inttofp-512.ll
[X86][SSE] getFauxShuffleMask - add support for INSERT_VECTOR_ELT(EXTRACT_VECTOR_ELT) shuffle pattern
2020-03-10 15:42:37 +00:00
vec-strict-round-128.ll
…
vec-trunc-store.ll
…
vecloadextract.ll
…
vector_splat-const-shift-of-constmasked.ll
…
vector-bitreverse.ll
[X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0)
2020-03-13 18:43:04 +00:00
vector-blend.ll
[X86] Always emit an integer vbroadcast_load from lowerBuildVectorAsBroadcast regardless of AVX vs AVX2
2020-03-03 10:39:11 -08:00
vector-compare-all_of.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vector-compare-any_of.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vector-compare-combines.ll
…
vector-compare-results.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vector-compare-simplify.ll
…
vector-constrained-fp-intrinsics-flags.ll
…
vector-constrained-fp-intrinsics-fma.ll
…
vector-constrained-fp-intrinsics.ll
…
vector-ext-logic.ll
…
vector-extend-inreg.ll
[X86] Add DAG combine to turn (vzext_movl (vbroadcast_load)) -> vzext_load.
2020-03-08 00:35:40 -08:00
vector-fshl-128.ll
…
vector-fshl-256.ll
[X86] Enable shuffle combining for AVX512 unless the root is used by a vselect
2020-04-11 20:05:10 -07:00
vector-fshl-512.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vector-fshl-rot-128.ll
…
vector-fshl-rot-256.ll
[X86] Enable shuffle combining for AVX512 unless the root is used by a vselect
2020-04-11 20:05:10 -07:00
vector-fshl-rot-512.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vector-fshr-128.ll
…
vector-fshr-256.ll
[X86] Enable shuffle combining for AVX512 unless the root is used by a vselect
2020-04-11 20:05:10 -07:00
vector-fshr-512.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vector-fshr-rot-128.ll
…
vector-fshr-rot-256.ll
[X86] Enable shuffle combining for AVX512 unless the root is used by a vselect
2020-04-11 20:05:10 -07:00
vector-fshr-rot-512.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vector-gep.ll
…
vector-half-conversions.ll
[X86] Recognize CVTPH2PS from STRICT_FP_EXTEND
2020-02-28 10:19:57 -08:00
vector-idiv-sdiv-128.ll
[X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0)
2020-03-13 18:43:04 +00:00
vector-idiv-sdiv-256.ll
…
vector-idiv-sdiv-512.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vector-idiv-udiv-128.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vector-idiv-udiv-256.ll
…
vector-idiv-udiv-512.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vector-idiv-v2i32.ll
…
vector-idiv.ll
…
vector-interleave.ll
…
vector-intrinsics.ll
…
vector-lzcnt-128.ll
[X86] Add DAG combine to replace vXi64 vzext_movl+scalar_to_vector with vYi32 vzext_movl+scalar_to_vector if the upper 32 bits of the scalar are zero.
2020-03-07 16:14:26 -08:00
vector-lzcnt-256.ll
…
vector-lzcnt-512.ll
…
vector-lzcnt-sub128.ll
…
vector-merge-store-fp-constants.ll
…
vector-mul.ll
[TargetLowering] SimplifyDemandedVectorElts - add DemandedElts mask to ISD::BITCAST SimplifyDemandedBits call.
2020-03-10 13:39:10 +00:00
vector-mulfix-legalize.ll
…
vector-narrow-binop.ll
…
vector-partial-undef.ll
…
vector-pcmp.ll
…
vector-popcnt-128.ll
…
vector-popcnt-256.ll
…
vector-popcnt-512.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vector-reduce-add.ll
[X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0)
2020-03-13 18:43:04 +00:00
vector-reduce-and-bool.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vector-reduce-and.ll
[X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0)
2020-03-13 18:43:04 +00:00
vector-reduce-fadd-fast.ll
[x86] use instruction-level fast-math-flags to drive MachineCombiner
2020-02-27 15:19:37 -05:00
vector-reduce-fadd.ll
…
vector-reduce-fmax-nnan.ll
…
vector-reduce-fmax.ll
…
vector-reduce-fmin-nnan.ll
…
vector-reduce-fmin.ll
…
vector-reduce-fmul-fast.ll
[x86] use instruction-level fast-math-flags to drive MachineCombiner
2020-02-27 15:19:37 -05:00
vector-reduce-fmul.ll
…
vector-reduce-mul.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vector-reduce-or-bool.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vector-reduce-or.ll
[X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0)
2020-03-13 18:43:04 +00:00
vector-reduce-smax.ll
[X86] Add sse4.2 command lines to min/max reduction tests.
2020-03-29 13:51:03 -07:00
vector-reduce-smin.ll
[DAG] SimplifyDemandedVectorElts - remove INSERT_SUBVECTOR if we don't demand the subvector
2020-05-01 16:20:51 +01:00
vector-reduce-umax.ll
[X86] Add sse4.2 command lines to min/max reduction tests.
2020-03-29 13:51:03 -07:00
vector-reduce-umin.ll
[X86] Add sse4.2 command lines to min/max reduction tests.
2020-03-29 13:51:03 -07:00
vector-reduce-xor-bool.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vector-reduce-xor.ll
[X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0)
2020-03-13 18:43:04 +00:00
vector-rem.ll
…
vector-rotate-128.ll
…
vector-rotate-256.ll
[DAG] SimplifyDemandedVectorElts - add EXTRACT_SUBVECTOR SimplifyMultipleUseDemandedBits handling
2020-05-01 13:48:07 +01:00
vector-rotate-512.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vector-sext.ll
[SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad
2020-05-02 15:18:10 -07:00
vector-shift-ashr-128.ll
…
vector-shift-ashr-256.ll
[X86][SSE] SimplifyDemandedVectorEltsForTargetNode - reduce vector width of X86ISD::BLENDI
2020-03-09 18:29:28 +00:00
vector-shift-ashr-512.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vector-shift-ashr-sub128.ll
…
vector-shift-by-select-loop.ll
…
vector-shift-lshr-128.ll
…
vector-shift-lshr-256.ll
[X86] Enable shuffle combining for AVX512 unless the root is used by a vselect
2020-04-11 20:05:10 -07:00
vector-shift-lshr-512.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vector-shift-lshr-sub128.ll
…
vector-shift-shl-128.ll
…
vector-shift-shl-256.ll
…
vector-shift-shl-512.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vector-shift-shl-sub128.ll
…
vector-shuffle-128-unpck.ll
…
vector-shuffle-128-v2.ll
…
vector-shuffle-128-v4.ll
[X86][AVX] Add X86ISD::VALIGN target shuffle decode support
2020-03-29 16:41:58 +01:00
vector-shuffle-128-v8.ll
[X86] Enable shuffle combining for AVX512 unless the root is used by a vselect
2020-04-11 20:05:10 -07:00
vector-shuffle-128-v16.ll
[X86] Prefer PACKUS(AND(),AND()) to SHUFFLE(PSHUFB(),PSHUFB()) on all targets
2020-03-26 20:46:24 +00:00
vector-shuffle-256-v4.ll
…
vector-shuffle-256-v8.ll
[X86][AVX] Add X86ISD::VALIGN target shuffle decode support
2020-03-29 16:41:58 +01:00
vector-shuffle-256-v16.ll
[X86][AVX] Add additional 256/512-bit test cases for PACKSS/PACKUS shuffle patterns
2020-04-01 08:19:03 +01:00
vector-shuffle-256-v32.ll
[X86] lowerV16I8Shuffle - create v8i16 mask for PACKUS(AND(),AND()) patterns.
2020-03-26 19:59:57 +00:00
vector-shuffle-512-v8.ll
[X86][AVX] lowerV4X128Shuffle - attempt to widen to 2x256 to simplify shuffles
2020-03-30 12:22:26 +01:00
vector-shuffle-512-v16.ll
…
vector-shuffle-512-v32.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vector-shuffle-512-v64.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vector-shuffle-avx512.ll
…
vector-shuffle-combining-avx2.ll
[X86][AVX] Combine 128-bit lane shuffles with a zeroable upper half to EXTRACT_SUBVECTOR (PR40720)
2020-03-29 16:41:59 +01:00
vector-shuffle-combining-avx512bw.ll
[X86][AVX] Attempt to scale masked shuffles to match the root type
2020-04-13 14:57:25 +01:00
vector-shuffle-combining-avx512bwvl.ll
…
vector-shuffle-combining-avx512f.ll
[X86][AVX] Attempt to scale masked shuffles to match the root type
2020-04-13 14:57:25 +01:00
vector-shuffle-combining-avx512vbmi.ll
[X86][AVX] Attempt to scale masked shuffles to match the root type
2020-04-13 14:57:25 +01:00
vector-shuffle-combining-avx.ll
[X86] Add DAG combines to enable removing of movddup/vbroadcast + simple_load isel patterns.
2020-03-07 15:22:02 -08:00
vector-shuffle-combining-sse4a.ll
…
vector-shuffle-combining-sse41.ll
…
vector-shuffle-combining-ssse3.ll
…
vector-shuffle-combining-xop.ll
…
vector-shuffle-combining.ll
[X86][SSE] getFauxShuffle - account for PEXTW/PEXTB implicit zero-extension
2020-04-27 12:46:50 +01:00
vector-shuffle-masked.ll
…
vector-shuffle-mmx.ll
…
vector-shuffle-sse1.ll
…
vector-shuffle-sse4a.ll
…
vector-shuffle-sse41.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vector-shuffle-v1.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vector-shuffle-v48.ll
…
vector-shuffle-variable-128.ll
…
vector-shuffle-variable-256.ll
…
vector-sqrt.ll
…
vector-trunc-math.ll
[X86] Custom legalize v16i64->v16i8 truncate with avx512.
2020-05-03 23:26:04 -07:00
vector-trunc-packus.ll
[X86] Custom legalize v16i64->v16i8 truncate with avx512.
2020-05-03 23:26:04 -07:00
vector-trunc-ssat.ll
[X86] Custom legalize v16i64->v16i8 truncate with avx512.
2020-05-03 23:26:04 -07:00
vector-trunc-usat.ll
[X86] Custom legalize v16i64->v16i8 truncate with avx512.
2020-05-03 23:26:04 -07:00
vector-trunc.ll
[X86][SSE] Generalize shuffle(HORIZOP,HORIZOP) -> HORIZOP combine
2020-04-05 12:09:19 +01:00
vector-truncate-combine.ll
…
vector-tzcnt-128.ll
[X86] Add DAG combine to replace vXi64 vzext_movl+scalar_to_vector with vYi32 vzext_movl+scalar_to_vector if the upper 32 bits of the scalar are zero.
2020-03-07 16:14:26 -08:00
vector-tzcnt-256.ll
…
vector-tzcnt-512.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vector-unsigned-cmp.ll
…
vector-variable-idx2.ll
…
vector-variable-idx.ll
…
vector-width-store-merge.ll
…
vector-zext.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
vector-zmov.ll
…
vector.ll
…
vectorcall.ll
[X86] Cleanup vectorcall test checks
2020-04-04 22:46:56 +01:00
version_directive.ll
…
vfcmp.ll
…
viabs.ll
[X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.
2020-04-15 12:17:18 -07:00
virtreg-physreg-def-regallocfast.mir
…
virtual-registers-cleared-in-machine-functions-liveins.ll
…
visibility2.ll
…
visibility.ll
…
vmaskmov-offset.ll
…
vmovq.ll
…
volatile-memstores-nooverlapping-load-stores.ll
…
volatile.ll
…
vortex-bug.ll
…
vp2intersect_multiple_pairs.ll
…
vpshufbitqbm-intrinsics-upgrade.ll
…
vpshufbitqbm-intrinsics.ll
…
vsel-cmp-load.ll
…
vselect-2.ll
…
vselect-avx.ll
…
vselect-constants.ll
[DAGCombine] foldVSelectOfConstants - ensure constants are same type
2020-03-12 20:02:05 +00:00
vselect-minmax.ll
…
vselect-packss.ll
…
vselect-pcmp.ll
…
vselect-zero.ll
…
vselect.ll
…
vshift_scalar.ll
…
vshift_split2.ll
…
vshift_split.ll
…
vshift-1.ll
…
vshift-2.ll
…
vshift-3.ll
…
vshift-4.ll
…
vshift-5.ll
…
vshift-6.ll
…
vshli-simplify-demanded-bits.ll
…
vsplit-and.ll
…
vzero-excess.ll
…
waitpkg-intrinsics.ll
…
warn-stack.ll
…
wbinvd-intrinsic.ll
…
wbnoinvd-intrinsic.ll
…
weak_def_can_be_hidden.ll
…
weak-undef.ll
…
weak.ll
…
webkit-jscc.ll
…
wide-fma-contraction.ll
…
wide-integer-cmp.ll
…
wide-integer-fold.ll
…
widen_arith-1.ll
…
widen_arith-2.ll
…
widen_arith-3.ll
…
widen_arith-4.ll
…
widen_arith-5.ll
…
widen_arith-6.ll
…
widen_bitops-0.ll
[X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0)
2020-03-13 18:43:04 +00:00
widen_bitops-1.ll
…
widen_cast-1.ll
…
widen_cast-2.ll
[SelectionDAG] Fix usage of Align constructing MachineMemOperands.
2020-04-15 13:01:41 -07:00
widen_cast-3.ll
…
widen_cast-4.ll
…
widen_cast-5.ll
…
widen_cast-6.ll
…
widen_compare-1.ll
…
widen_conv-1.ll
…
widen_conv-2.ll
…
widen_conv-3.ll
…
widen_conv-4.ll
…
widen_conversions.ll
…
widen_extract-1.ll
…
widen_load-0.ll
…
widen_load-1.ll
…
widen_load-2.ll
[SelectionDAG] Fix usage of Align constructing MachineMemOperands.
2020-04-15 13:01:41 -07:00
widen_load-3.ll
…
widen_mul.ll
…
widen_shuffle-1.ll
…
WidenArith.ll
…
widened-broadcast.ll
…
win32_sret.ll
…
win32-bool.ll
…
win32-eh-available-externally.ll
…
win32-eh-states.ll
…
win32-eh.ll
…
win32-pic-jumptable.ll
…
win32-preemption.ll
…
win32-seh-catchpad-realign.ll
…
win32-seh-catchpad.ll
…
win32-seh-nested-finally.ll
…
win32-spill-xmm.ll
…
win32-ssp.ll
…
win64_alloca_dynalloca.ll
…
win64_call_epi.ll
…
win64_eh_leaf2.ll
…
win64_eh_leaf.ll
…
win64_eh.ll
…
win64_frame.ll
…
win64_nonvol.ll
…
win64_params.ll
…
win64_sibcall.ll
…
win64_vararg.ll
…
win64-bool.ll
…
win64-byval.ll
…
win64-eh-empty-block-2.mir
[Win64] Insert int3 into trailing empty BBs
2020-03-23 08:50:37 -07:00
win64-eh-empty-block.ll
[Win64] Insert int3 into trailing empty BBs
2020-03-23 08:50:37 -07:00
win64-funclet-savexmm.ll
…
win64-jumptable.ll
…
win64-long-double.ll
…
win64-nosse-csrs.ll
…
win64-stackprobe-overflow.ll
…
win_chkstk.ll
…
win_coreclr_chkstk_liveins.mir
…
win_coreclr_chkstk.ll
…
win_cst_pool.ll
…
win-alloca-expander.ll
…
win-catchpad-csrs.ll
…
win-catchpad-nested-cxx.ll
…
win-catchpad-nested.ll
…
win-catchpad-varargs.ll
…
win-catchpad.ll
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win-cleanuppad.ll
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win-funclet-cfi.ll
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win-mixed-ehpersonality.ll
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win-smallparams.ll
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windows-itanium-alloca.ll
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wineh-coreclr.ll
[Win64] Insert int3 into trailing empty BBs
2020-03-23 08:50:37 -07:00
wineh-exceptionpointer.ll
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wineh-no-ehpads.ll
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x32-cet-intrinsics.ll
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x32-function_pointer-1.ll
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x32-function_pointer-2.ll
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x32-function_pointer-3.ll
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x32-indirectbr.ll
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x32-landingpad.ll
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x32-lea-1.ll
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x32-movtopush64.ll
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x32-va_start.ll
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x64-cet-intrinsics.ll
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x86_64-mul-by-const.ll
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x86-16.ll
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x86-32-intrcc.ll
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x86-32-vector-calling-conv.ll
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x86-64-and-mask.ll
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x86-64-arg.ll
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x86-64-asm.ll
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x86-64-baseptr.ll
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x86-64-bittest-logic.ll
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x86-64-call.ll
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x86-64-disp.ll
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x86-64-double-precision-shift-left.ll
[DAG] MatchRotate - Add funnel shift by immediate support
2020-03-11 18:55:18 +00:00
x86-64-double-precision-shift-right.ll
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x86-64-double-shifts-Oz-Os-O2.ll
[DAG] MatchRotate - Add funnel shift by immediate support
2020-03-11 18:55:18 +00:00
x86-64-double-shifts-var.ll
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x86-64-extend-shift.ll
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x86-64-flags-intrinsics.ll
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x86-64-gv-offset.ll
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x86-64-intrcc-nosse.ll
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x86-64-intrcc.ll
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x86-64-jumps.ll
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x86-64-mem.ll
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x86-64-ms_abi-vararg.ll
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x86-64-pic-1.ll
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x86-64-pic-2.ll
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x86-64-pic-3.ll
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x86-64-pic-4.ll
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x86-64-pic-5.ll
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x86-64-pic-6.ll
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x86-64-pic-7.ll
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x86-64-pic-8.ll
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x86-64-pic-9.ll
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x86-64-pic-10.ll
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x86-64-pic-11.ll
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x86-64-pic-12.ll
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x86-64-pic.ll
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x86-64-plt-relative-reloc.ll
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x86-64-psub.ll
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x86-64-ptr-arg-simple.ll
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x86-64-ret0.ll
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x86-64-shortint.ll
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x86-64-sret-return-2.ll
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x86-64-sret-return.ll
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x86-64-stack-and-frame-ptr.ll
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x86-64-static-relo-movl.ll
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x86-64-tls-1.ll
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x86-64-varargs.ll
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x86-64-veccallcc.ll
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x86-big-ret.ll
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x86-cmov-converter.ll
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x86-flags-intrinsics.ll
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x86-fold-pshufb.ll
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x86-framelowering-trap.ll
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x86-inline-asm-validation.ll
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x86-interleaved-access.ll
[X86] Combine concat(palignr,palignr) -> palignr(concat,concat)
2020-03-31 11:06:35 +01:00
x86-interleaved-check.ll
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x86-interrupt_cc.ll
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x86-interrupt_cld.ll
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x86-interrupt_vzeroupper.ll
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x86-mixed-alignment-dagcombine.ll
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x86-no_caller_saved_registers-preserve.ll
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x86-no_caller_saved_registers.ll
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x86-plt-relative-reloc.ll
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x86-repmov-copy-eflags.ll
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x86-sanitizer-shrink-wrapping.ll
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x86-setcc-int-to-fp-combine.ll
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x86-shifts.ll
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x86-shrink-wrap-unwind.ll
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x86-shrink-wrapping.ll
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x86-store-gv-addr.ll
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x86-upgrade-avx2-vbroadcast.ll
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x86-upgrade-avx-vbroadcast.ll
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x86-win64-shrink-wrapping.ll
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x87-reg-usage.mir
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x87.ll
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xaluo.ll
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xchg-nofold.ll
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xmm-r64.ll
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xmulo.ll
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xop-ifma.ll
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xop-intrinsics-fast-isel.ll
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xop-intrinsics-x86_64-upgrade.ll
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xop-intrinsics-x86_64.ll
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xop-mask-comments.ll
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xop-pcmov.ll
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xor-combine-debugloc.ll
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xor-icmp.ll
[x86] add tests for awkward 'icmp eq i1'; NFC
2020-04-29 14:39:47 -04:00
xor-select-i1-combine.ll
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xor.ll
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xray-attribute-instrumentation.ll
[XRay] Change xray_instr_map sled addresses from absolute to PC relative for x86-64
2020-04-21 09:36:09 -07:00
xray-custom-log.ll
Revert "Reland "[DebugInfo] Enable the debug entry values feature by default""
2020-02-20 14:41:39 +01:00
xray-empty-firstmbb.mir
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xray-ignore-loop-detection.ll
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xray-log-args.ll
[XRay] Change Sled.Function to PC-relative for sled version 2 and make llvm-xray support sled version 2 addresses
2020-04-24 14:41:56 -07:00
xray-loop-detection.ll
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xray-multiplerets-in-blocks.mir
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xray-partial-instrumentation-skip-entry.ll
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xray-partial-instrumentation-skip-exit.ll
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xray-section-group.ll
[XRay] Change xray_instr_map sled addresses from absolute to PC relative for x86-64
2020-04-21 09:36:09 -07:00
xray-selective-instrumentation-miss.ll
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xray-selective-instrumentation.ll
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xray-tail-call-sled.ll
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xray-typed-event-log.ll
Revert "Reland "[DebugInfo] Enable the debug entry values feature by default""
2020-02-20 14:41:39 +01:00
xtest.ll
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zero-remat.ll
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zext-demanded.ll
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zext-extract_subreg.ll
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zext-fold.ll
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zext-inreg-0.ll
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zext-inreg-1.ll
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zext-logicop-shift-load.ll
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zext-sext.ll
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zext-shl.ll
…
zext-trunc.ll
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zlib-longest-match.ll
…