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Nick Desaulniers 6b0e2fa6f0 [SelectionDAG] make INLINEASM_BR use MachineBasicBlocks instead of BlockAddresses 
As part of re-architecting callbr to no longer use blockaddresses
(https://reviews.llvm.org/D129288), we don't really need them in MIR.
They make comparing MachineBasicBlocks of indirect targets during
MachineVerifier a PITA.

Suggested by @efriedma from the discussion:
https://reviews.llvm.org/D130290#3669531

Reviewed By: efriedma, void

Differential Revision: https://reviews.llvm.org/D130316
2022-08-17 09:34:31 -07:00
..
GlobalISel
[GISel] Check useLoadStackGuardNode() before generating LOAD_STACK_GUARD
2022-07-12 11:44:42 -04:00
2004-11-29-ShrCrash.ll
…
2004-11-30-shift-crash.ll
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2004-11-30-shr-var-crash.ll
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2004-12-12-ZeroSizeCommon.ll
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2005-01-14-SetSelectCrash.ll
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2005-01-14-UndefLong.ll
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2005-08-12-rlwimi-crash.ll
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2005-09-02-LegalizeDuplicatesCalls.ll
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2005-10-08-ArithmeticRotate.ll
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2005-11-30-vastart-crash.ll
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2006-01-11-darwin-fp-argument.ll
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2006-01-20-ShiftPartsCrash.ll
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2006-04-01-FloatDoubleExtend.ll
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2006-04-05-splat-ish.ll
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2006-04-19-vmaddfp-crash.ll
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2006-05-12-rlwimi-crash.ll
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2006-07-07-ComputeMaskedBits.ll
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2006-07-19-stwbrx-crash.ll
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2006-08-11-RetVector.ll
[PowerPC] Disable perfect shuffle by default
2022-03-15 15:52:24 +08:00
2006-08-15-SelectionCrash.ll
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2006-09-28-shift_64.ll
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2006-10-13-Miscompile.ll
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2006-10-17-brcc-miscompile.ll
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2006-10-17-ppc64-alloca.ll
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2006-11-10-DAGCombineMiscompile.ll
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2006-11-29-AltivecFPSplat.ll
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2006-12-07-LargeAlloca.ll
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2006-12-07-SelectCrash.ll
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2007-01-04-ArgExtension.ll
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2007-01-15-AsmDialect.ll
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2007-01-29-lbrx-asm.ll
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2007-01-31-InlineAsmAddrMode.ll
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2007-02-16-AlignPacked.ll
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2007-02-16-InlineAsmNConstraint.ll
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2007-02-23-lr-saved-twice.ll
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2007-03-24-cntlzd.ll
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2007-03-30-SpillerCrash.ll
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2007-04-24-InlineAsm-I-Modifier.ll
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2007-04-30-InlineAsmEarlyClobber.ll
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2007-05-03-InlineAsm-S-Constraint.ll
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2007-05-14-InlineAsmSelectCrash.ll
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2007-05-22-tailmerge-3.ll
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2007-05-30-dagcombine-miscomp.ll
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2007-06-28-BCCISelBug.ll
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2007-08-04-CoalescerAssert.ll
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2007-09-04-AltivecDST.ll
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2007-09-07-LoadStoreIdxForms.ll
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2007-09-08-unaligned.ll
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2007-09-11-RegCoalescerAssert.ll
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2007-09-12-LiveIntervalsAssert.ll
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2007-10-16-InlineAsmFrameOffset.ll
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2007-10-18-PtrArithmetic.ll
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2007-10-21-LocalRegAllocAssert2.ll
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2007-10-21-LocalRegAllocAssert.ll
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2007-11-04-CoalescerCrash.ll
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2007-11-16-landingpad-split.ll
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2007-11-19-VectorSplitting.ll
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2008-02-05-LiveIntervalsAssert.ll
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2008-02-09-LocalRegAllocAssert.ll
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2008-03-05-RegScavengerAssert.ll
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2008-03-17-RegScavengerCrash.ll
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2008-03-18-RegScavengerAssert.ll
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2008-03-24-AddressRegImm.ll
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2008-03-24-CoalescerBug.ll
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2008-03-26-CoalescerBug.ll
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2008-04-10-LiveIntervalCrash.ll
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2008-04-16-CoalescerBug.ll
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2008-04-23-CoalescerCrash.ll
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2008-05-01-ppc_fp128.ll
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2008-06-19-LegalizerCrash.ll
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2008-06-21-F128LoadStore.ll
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2008-06-23-LiveVariablesCrash.ll
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2008-07-10-SplatMiscompile.ll
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2008-07-15-Bswap.ll
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2008-07-15-Fabs.ll
[IR] Remove support for float binop constant expressions
2022-07-12 09:40:49 +02:00
2008-07-15-SignExtendInreg.ll
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2008-07-17-Fneg.ll
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2008-07-24-PPC64-CCBug.ll
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2008-09-12-CoalescerBug.ll
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2008-10-17-AsmMatchingOperands.ll
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2008-10-28-f128-i32.ll
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2008-10-28-UnprocessedNode.ll
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2008-12-02-LegalizeTypeAssert.ll
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2009-01-16-DeclareISelBug.ll
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2009-03-17-LSRBug.ll
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2009-05-28-LegalizeBRCC.ll
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2009-07-16-InlineAsm-M-Operand.ll
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2009-08-17-inline-asm-addr-mode-breakage.ll
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2009-09-18-carrybit.ll
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2009-11-15-ProcImpDefsBug.ll
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2009-11-25-ImpDefBug.ll
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2010-02-04-EmptyGlobal.ll
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2010-02-12-saveCR.ll
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2010-03-09-indirect-call.ll
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2010-04-01-MachineCSEBug.ll
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2010-05-03-retaddr1.ll
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2010-10-11-Fast-Varargs.ll
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2010-12-18-PPCStackRefs.ll
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2011-12-05-NoSpillDupCR.ll
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2011-12-06-SpillAndRestoreCR.ll
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2011-12-08-DemandedBitsMiscompile.ll
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2012-09-16-TOC-entry-check.ll
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2012-10-11-dynalloc.ll
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2012-10-12-bitcast.ll
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2012-11-16-mischedcall.ll
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2013-05-15-preinc-fold.ll
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2013-07-01-PHIElimBug.mir
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2016-01-07-BranchWeightCrash.ll
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2016-04-16-ADD8TLS.ll
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2016-04-17-combine.ll
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2016-04-28-setjmp.ll
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2018-09-19-sextinreg-vector-crash.ll
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a2-fp-basic.ll
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aa-tbaa.ll
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aantidep-def-ec.mir
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aantidep-inline-asm-use.ll
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absol-jump-table-enabled.ll
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add_cmp.ll
Revert "[CodeGen] Place SDNode debug ID declaration under appropriate #if"
2022-04-06 20:32:53 +03:00
add-fi.ll
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addc.ll
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adde_return_type.ll
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addegluecrash.ll
[PowerPC] Enable CR bits support for Power8 and above.
2022-05-02 12:06:15 -05:00
addi-licm.ll
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addi-offset-fold.ll
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addi-reassoc.ll
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addisdtprelha-nonr3.mir
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addrfuncstr.ll
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addrspacecast.ll
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addze.ll
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aggressive-anti-dep-breaker-subreg.ll
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aix32-cc-abi-vaarg.ll
[DAGCombine] Add node in the worklist in topological order in CombineTo
2022-05-07 16:24:31 +00:00
aix32-crsave.mir
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aix32-p8-scalar_vector_conversions.ll
[PowerPC] Disable perfect shuffle by default
2022-03-15 15:52:24 +08:00
aix32-vector-vararg-callee-split.ll
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aix32-vector-vararg-callee.ll
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aix32-vector-vararg-caller-split.ll
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aix32-vector-vararg-fixed-callee.ll
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aix64-cc-abi-vaarg.ll
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aix64-cc-byval.ll
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aix64-vector-vararg-callee.ll
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aix64-vector-vararg-fixed-callee.ll
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aix_scalar_vector_permuted.ll
[DAG] visitINSERT_VECTOR_ELT - fold insert_vector_elt(scalar_to_vector(x),v,i) -> build_vector()
2022-06-11 15:29:22 +01:00
aix-alias-alignment-2.ll
[AIX] Handling the label alignment of a global
2022-07-03 23:16:16 -04:00
aix-alias-alignment-3.ll
[AIX] follow-up of D124654.
2022-07-21 01:10:09 -04:00
aix-alias-alignment.ll
[AIX] Handling the label alignment of a global
2022-07-03 23:16:16 -04:00
aix-alias-unsupported.ll
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aix-alias.ll
[AIX] Handling the label alignment of a global
2022-07-03 23:16:16 -04:00
aix-alloca-r31.ll
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aix-AppendingLinkage.ll
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aix-aux-header.ll
[XCOFF] write the aux header when the visibility is specified in XCOFF32.
2022-07-20 07:09:34 -04:00
aix-available-externally-linkage.ll
[XCOFF] support writing sections, relocations and symbols for XCOFF64.
2022-05-17 04:27:47 -04:00
aix-base-pointer.ll
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aix-bytestring.ll
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aix-calleesavedregs.ll
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aix-cc-abi.ll
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aix-cc-altivec.ll
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aix-cc-byval-limitation3.ll
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aix-cc-byval-mem.ll
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aix-cc-byval-split.ll
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aix-cc-byval.ll
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aix-cc-ext-vec-abi.ll
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aix-complex.ll
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aix-constant-align.ll
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aix-crspill.ll
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aix-csr-alloc.ll
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aix-csr-vector-extabi.ll
[NFCI] Fixed missing colon in CHECK directives - part 2
2022-04-03 14:42:59 +02:00
aix-csr-vector.ll
[NFCI] Fixed missing colon in CHECK directives - part 2
2022-04-03 14:42:59 +02:00
aix-csr.ll
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aix-dfltabi-rsrvd-reg.ll
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aix-dwarf.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-ehinfo-sym.ll
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aix-emit-tracebacktable-clobber-register.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-emit-tracebacktable-ssp.ll
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aix-emit-tracebacktable-vectorinfo_hasvarg.ll
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aix-emit-tracebacktable-vectorinfo.ll
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aix-emit-tracebacktable.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-exception.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-extern-weak.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-extern.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-external-sym-sdnode-lowering.ll
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aix-filename-absolute-path.ll
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aix-filename-relative-path.ll
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aix-filename-special-character-double-quotation.ll
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aix-filename-special-character-single-quotation.ll
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aix-fptoint.ll
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aix-framepointer-save-restore.ll
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aix-func-align.ll
[XCOFF] support writing sections, relocations and symbols for XCOFF64.
2022-05-17 04:27:47 -04:00
aix-func-dsc-gen.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-ignore-xcoff-visibility.ll
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aix-indirect-call.ll
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aix-inlineasm-reserved-reg-dflt-warn.ll
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aix-insert-extract.ll
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aix-internal.ll
[XCOFF] support writing sections, relocations and symbols for XCOFF64.
2022-05-17 04:27:47 -04:00
aix-LinkOnceAnyLinkage.ll
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aix-LinkOnceODRLinkage.ll
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aix-llvm-intrinsic.ll
[XCOFF] write the real source file name in C_FILE symbol.
2022-06-22 06:23:36 -04:00
aix-lower-block-address.ll
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aix-lower-constant-pool-index.ll
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aix-lower-jump-table.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-lr.ll
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aix-nest-param.ll
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aix-nonzero-zerofill.ll
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aix-overflow-toc.py
[XCOFF] support XCOFFObjectWriter for fileHeader and sectionHeaders in 64-bit XCOFF.
2022-03-20 09:31:29 -04:00
aix-p8vector-liveins.ll
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aix-p9-insert-extract.ll
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aix-p9-xxinsertw-xxextractuw.ll
[PowerPC] Disable perfect shuffle by default
2022-03-15 15:52:24 +08:00
aix-personality-alias.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-prefixed-instruction-boundary.mir
Reland [XCOFF][llvm-objdump] change the priority of symbols with the same address by symbol types.
2022-02-20 21:51:10 -05:00
aix-print-pc.mir
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aix-readonly-with-relocation.ll
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aix-reference-func-addr-const.ll
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aix-relativeref.ll
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aix-return55.ll
[XCOFF] support writing sections, relocations and symbols for XCOFF64.
2022-05-17 04:27:47 -04:00
aix-rodata-align.ll
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aix-space.ll
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aix-sret-param.ll
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aix-static-init-default-priority.ll
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aix-static-init-key-object.ll
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aix-static-init-no-unique-module-id.ll
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aix-static-init-non-default-priority.ll
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aix-tls-gd-double.ll
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aix-tls-gd-int.ll
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aix-tls-gd-longlong.ll
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aix-tls-variables-ppc32.ll
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aix-tls-variables-ppc64.ll
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aix-tls-xcoff-reloc-large.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-tls-xcoff-reloc.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-tls-xcoff-variables.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-tracetable-csr.ll
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aix-trampoline.ll
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aix-undef-func-call.ll
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aix-user-defined-memcpy.ll
[XCOFF] support XCOFFObjectWriter for fileHeader and sectionHeaders in 64-bit XCOFF.
2022-03-20 09:31:29 -04:00
aix-vec_extract_p9_2.ll
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aix-vec_extract_p9.ll
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aix-vec_insert_elt.ll
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aix-vec-arg-spills-callee.ll
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aix-vec-arg-spills-mir.ll
[InstCombine] handle subobjects of constant aggregates
2022-06-21 11:55:14 -06:00
aix-vec-arg-spills.ll
[InstCombine] handle subobjects of constant aggregates
2022-06-21 11:55:14 -06:00
aix-vector-stack-caller.ll
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aix-vector-stack.ll
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aix-vector-vararg-caller.ll
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aix-vector-vararg-fixed-caller.ll
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aix-vsx-splatimm.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
aix-weak-undef-func-call.ll
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aix-weak.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-WeakODRLinkage.ll
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aix-xcoff-cold.ll
[XCOFF] ignore the cold attribute.
2022-08-11 01:13:05 -04:00
aix-xcoff-data-only-notoc.ll
[XCOFF] support writing sections, relocations and symbols for XCOFF64.
2022-05-17 04:27:47 -04:00
aix-xcoff-data-sections.ll
…
aix-xcoff-data.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-xcoff-endian-error.ll
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aix-xcoff-error-explicit-data-section.ll
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aix-xcoff-explicit-section.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-xcoff-exported-nondefault.ll
[LLVM] Add exported visibility style for XCOFF
2022-04-28 14:56:00 -04:00
aix-xcoff-externL.ll
[XCOFF] support writing sections, relocations and symbols for XCOFF64.
2022-05-17 04:27:47 -04:00
aix-xcoff-funcsect.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-xcoff-huge-relocs.ll
[XCOFF] support writing sections, relocations and symbols for XCOFF64.
2022-05-17 04:27:47 -04:00
aix-xcoff-lcomm.ll
[XCOFF] support writing sections, relocations and symbols for XCOFF64.
2022-05-17 04:27:47 -04:00
aix-xcoff-lower-comm.ll
[XCOFF] support writing sections, relocations and symbols for XCOFF64.
2022-05-17 04:27:47 -04:00
aix-xcoff-mergeable-const.ll
Reland [XCOFF][llvm-objdump] change the priority of symbols with the same address by symbol types.
2022-02-20 21:51:10 -05:00
aix-xcoff-mergeable-str.ll
…
aix-xcoff-reloc-large.ll
[XCOFF] support writing sections, relocations and symbols for XCOFF64.
2022-05-17 04:27:47 -04:00
aix-xcoff-reloc-symb.mir
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-xcoff-reloc.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-xcoff-rodata.ll
[XCOFF] support writing sections, relocations and symbols for XCOFF64.
2022-05-17 04:27:47 -04:00
aix-xcoff-symbol-rename.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
aix-xcoff-textdisassembly.ll
Reland [XCOFF][llvm-objdump] change the priority of symbols with the same address by symbol types.
2022-02-20 21:51:10 -05:00
aix-xcoff-toc.ll
[XCOFF] support writing sections, relocations and symbols for XCOFF64.
2022-05-17 04:27:47 -04:00
aix-xcoff-used.ll
…
aix-xcoff-visibility.ll
[XCOFF] write the aux header when the visibility is specified in XCOFF32.
2022-07-20 07:09:34 -04:00
alias.ll
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align.ll
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alignlongjumptest.mir
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alloca-crspill.ll
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allocate-r0.ll
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altivec-ord.ll
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and_add.ll
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and_sext.ll
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and_sra.ll
…
and-branch.ll
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and-elim.ll
…
and-imm.ll
…
and-mask.ll
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andc.ll
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anon_aggr.ll
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anyext_srl.ll
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arg_promotion.ll
[ArgPromotion] Remove legacy PM support
2022-06-27 09:42:17 +02:00
arr-fp-arg-no-copy.ll
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ashr-neg1.ll
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asm-constraints.ll
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asm-dialect.ll
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asm-printer-topological-order.ll
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asm-template-I.ll
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asm-Zy.ll
…
asym-regclass-copy.ll
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atomic-1.ll
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atomic-2.ll
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atomic-float.ll
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atomic-minmax.ll
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Atomics-64.ll
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atomics-constant.ll
[Local] Consider atomic loads from constant global as dead
2022-05-02 10:52:58 +02:00
atomics-fences.ll
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atomics-i8-ldst.ll
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atomics-i16-ldst.ll
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atomics-i32-ldst.ll
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atomics-i64-ldst.ll
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atomics-i128-ldst.ll
[PowerPC] Generate tests for 16-byte atomic load/store. NFC.
2022-04-09 16:36:57 +08:00
atomics-i128.ll
[PowerPC] Adjust MaxAtomicSizeInBitsSupported on PPC64
2022-04-09 00:03:09 +00:00
atomics-indexed.ll
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atomics-regression.ll
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atomics.ll
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available-externally.ll
…
basic-toc-data-def.ll
[XCOFF] support writing sections, relocations and symbols for XCOFF64.
2022-05-17 04:27:47 -04:00
basic-toc-data-extern.ll
[XCOFF] support writing sections, relocations and symbols for XCOFF64.
2022-05-17 04:27:47 -04:00
basic-toc-data-local-linkage.ll
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bcd-intrinsics.ll
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bdzlr.ll
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bfloat16-outer-product.ll
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big-endian-actual-args.ll
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big-endian-call-result.ll
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big-endian-formal-args.ll
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big-endian-store-forward.ll
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bitcast-peephole.mir
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bitcasts-direct-move.ll
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bitfieldinsert.ll
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block-placement-1.mir
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block-placement.mir
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blockaddress.ll
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bool-math.ll
[SDAG] try to replace subtract-from-constant with xor
2022-07-08 08:14:24 -04:00
BoolRetToIntTest-2.ll
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BoolRetToIntTest.ll
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botheightreduce.mir
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bperm.ll
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branch_coalesce.ll
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branch_selector.ll
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branch-hint.ll
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branch-opt.ll
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brcond.ll
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BreakableToken-reduced.ll
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bswap64.ll
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bswap-load-store.ll
[PowerPC] Fix PPCISD::STBRX selection issue on A2
2022-05-10 20:47:51 -04:00
build-vector-allones.ll
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build-vector-tests.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
buildvec_canonicalize.ll
…
builtins-ppc-elf2-abi.ll
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builtins-ppc-p8vector.ll
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builtins-ppc-p9-darn.ll
[PowerPC] Mark side effects of Power9 darn instruction
2022-04-18 13:21:40 +08:00
builtins-ppc-p9-f128.ll
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builtins-ppc-p10permute.ll
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builtins-ppc-p10vsx.ll
enable P10 vector builtins test on AIX 64 bit; NFC
2022-07-21 04:23:02 -04:00
builtins-ppc-xlcompat-check-ldarx-opt.ll
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builtins-ppc-xlcompat-cmpb-32.ll
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builtins-ppc-xlcompat-cmpb-64.ll
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builtins-ppc-xlcompat-compare-64bit-only.ll
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builtins-ppc-xlcompat-compare.ll
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builtins-ppc-xlcompat-conversionfunc.ll
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builtins-ppc-xlcompat-fnabs.ll
[PowerPC] Implement XL compat __fnabs and __fnabss builtins.
2022-05-19 11:28:40 -05:00
builtins-ppc-xlcompat-fp.ll
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builtins-ppc-xlcompat-load-store-reversed-64bit-only.ll
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builtins-ppc-xlcompat-load-store-reversed.ll
…
builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
…
builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
…
builtins-ppc-xlcompat-math.ll
[PowerPC] Add generic fnmsub intrinsic
2022-03-07 13:00:06 +08:00
builtins-ppc-xlcompat-maxmin.ll
[Clang][PowerPC] Add max/min intrinsics to Clang and PPC backend
2022-04-05 22:43:48 -04:00
builtins-ppc-xlcompat-mfspr-mtspr-64bit-only.ll
…
builtins-ppc-xlcompat-mfspr-mtspr-aix32.ll
…
builtins-ppc-xlcompat-move-tofrom-regs.ll
…
builtins-ppc-xlcompat-msync.ll
…
builtins-ppc-xlcompat-multiply-64bit-only.ll
…
builtins-ppc-xlcompat-multiply.ll
…
builtins-ppc-xlcompat-popcnt.ll
…
builtins-ppc-xlcompat-prefetch.ll
…
builtins-ppc-xlcompat-pwr9-64bit.ll
…
builtins-ppc-xlcompat-pwr9.ll
…
builtins-ppc-xlcompat-stfiw.ll
…
builtins-ppc-xlcompat-sync-32.ll
…
builtins-ppc-xlcompat-sync-64.ll
…
builtins-ppc-xlcompat-test.ll
…
builtins-ppc-xlcompat-trap-64bit-only.ll
…
builtins-ppc-xlcompat-trap.ll
…
bv-pres-v8i1.ll
…
bv-widen-undef.ll
…
byval-agg-info.ll
…
byval-aliased.ll
…
byval.ll
[PowerPC] Fix lowering of byval parameters for sizes greater than 8 bytes.
2022-03-31 15:12:46 -05:00
calls.ll
…
can-lower-ret.ll
…
cannonicalize-vector-shifts.ll
…
canonical-merge-shuffles.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
cc.ll
…
cfence-double.ll
[PowerPC][AIX] Fix assertion message on AIX. NFC.
2022-06-24 12:03:57 +08:00
cfence-float.ll
[PowerPC][AIX] Fix assertion message on AIX. NFC.
2022-06-24 12:03:57 +08:00
cfence-i128.ll
[PowerPC] Add test for failing lowering llvm.ppc.cfence on i128. NFC.
2022-03-25 17:56:11 +08:00
cgp-select.ll
…
change-no-infs.ll
…
check-cpu.ll
[NFC][PowerPC] Fix the check-cpu.ll test case.
2022-02-23 14:09:34 -06:00
cmp_elimination.ll
…
cmp-cmp.ll
…
cmpb-ppc32.ll
…
cmpb.ll
…
coalesce-ext.ll
…
code-align.ll
…
codemodel.ll
[Support] Make report_fatal_error respect its GenCrashDiag argument so it doesn't generate a backtrace
2022-05-30 19:19:23 +01:00
coldcc2.ll
…
coldcc.ll
…
collapse-rotates.mir
…
combine_ext_trunc.ll
…
combine-fneg.ll
…
combine-setcc.ll
…
combine-sext-and-shl-after-isel.ll
…
combine-to-mulh-shift-amount.ll
…
combine-to-pre-index-store-crash.ll
…
common-chain-aix32.ll
…
common-chain.ll
…
compare-duplicate.ll
…
compare-simm.ll
…
CompareEliminationSpillIssue.ll
…
complex-return.ll
…
compute-regpressure.ll
…
constant-combines.ll
…
constant-pool.ll
…
constants-i64.ll
…
constants.ll
…
convert-ri-addi-to-ri.mir
…
convert-rr-to-ri-instr-add.mir
…
convert-rr-to-ri-instrs-kill-flag.mir
…
convert-rr-to-ri-instrs-out-of-range.mir
…
convert-rr-to-ri-instrs-R0-special-handling.mir
…
convert-rr-to-ri-instrs.mir
…
convert-rr-to-ri-p9-vector.mir
…
copysignl.ll
…
cr1eq-no-extra-moves.ll
…
cr1eq.ll
…
cr_spilling.ll
…
cr-spills.ll
…
crash.ll
…
crbit-asm-disabled.ll
…
crbit-asm.ll
…
crbits.ll
…
crsave.ll
…
crypto_bifs_be.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
crypto_bifs.ll
…
cse-despite-rounding-mode.ll
…
CSR-fit.ll
…
csr-save-restore-order.ll
…
csr-split.ll
…
ctr-cleanup.ll
…
ctr-loop-tls-const.ll
…
ctr-minmaxnum.ll
…
ctrloop-asm.ll
…
ctrloop-constrained-fp.ll
…
ctrloop-cpsgn.ll
…
ctrloop-fp64.ll
…
ctrloop-fp128.ll
…
ctrloop-i64.ll
…
ctrloop-i128.ll
…
ctrloop-intrin.ll
[PowerPC][NFC] use right hardware loop intrinsics in test case
2022-03-20 10:00:57 -04:00
ctrloop-large-ec.ll
…
ctrloop-le.ll
…
ctrloop-lt.ll
…
ctrloop-ne.ll
…
ctrloop-reg.ll
…
ctrloop-s000.ll
…
ctrloop-sh.ll
…
ctrloop-shortLoops.ll
…
ctrloop-sums.ll
…
ctrloop-udivti3.ll
…
ctrloops32.mir
[PowerPC] mapping hardward loop intrinsics to powerpc pseudo
2022-08-08 21:34:20 -04:00
ctrloops64.mir
[PowerPC] mapping hardward loop intrinsics to powerpc pseudo
2022-08-08 21:34:20 -04:00
ctrloops-hot-exit.ll
…
ctrloops-pseudo.ll
[PowerPC] mapping hardward loop intrinsics to powerpc pseudo
2022-08-08 21:34:20 -04:00
ctrloops-softfloat.ll
…
ctrloops.ll
…
cttz.ll
…
cvt_i64_to_fp.ll
…
cxx_tlscc64.ll
…
darwin-labels.ll
…
dbg.ll
…
DbgValueOtherTargets.test
…
dcbf-p10.ll
…
dcbf.ll
…
dcbt-sched.ll
…
dcbt.ll
…
debug-label-fast-isel.ll
…
debuginfo-split-int.ll
…
debuginfo-stackarg.ll
…
delete-node.ll
…
dform-adjust.ll
…
dform-pair-load-store.ll
…
direct-move-profit.ll
…
disable-ctr-ppcf128.ll
…
DisableHoistingDueToBlockHotnessNoProfileData.mir
…
DisableHoistingDueToBlockHotnessProfileData.mir
…
div-2.ll
…
div-e-32.ll
…
div-e-all.ll
…
dscr-set.ll
[PowerPC] Set the special DSCR with a compiler option.
2022-03-31 14:06:30 -05:00
dsolocal-pic.ll
…
dsolocal-static.ll
…
dssall.ll
…
duplicate-returns-for-tailcall.ll
…
dyn-alloca-aligned.ll
…
dyn-alloca-offset.ll
…
e500-1.ll
…
early-ret2.ll
…
early-ret-verify.mir
…
early-ret.ll
…
early-ret.mir
…
ec-input.ll
…
eh-dwarf-cfa.ll
…
eieio.ll
…
elf64-byval-cc.ll
…
elf-common.ll
…
eliminate-compare-of-copy.ll
…
empty-functions.ll
…
emptystruct.ll
…
emutls_generic.ll
…
eqv-andc-orc-nor.ll
…
expand-contiguous-isel.ll
…
expand-foldable-isel.ll
…
expand-isel-1.mir
…
expand-isel-2.mir
…
expand-isel-3.mir
…
expand-isel-4.mir
…
expand-isel-5.mir
…
expand-isel-6.mir
…
expand-isel-7.mir
…
expand-isel-8.mir
…
expand-isel-9.mir
…
expand-isel-10.mir
…
expand-isel-liveness.mir
…
expand-isel.ll
…
ext-bool-trunc-repl.ll
…
extra-toc-reg-deps.ll
…
extract-and-store.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
extsh.ll
…
extswsli.ll
…
f32-to-i64.ll
…
f128_ldst.ll
…
f128-aggregates.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
f128-arith.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
f128-bitcast.ll
…
f128-branch-cond.ll
[PowerPC] Enable CR bits support for Power8 and above.
2022-05-02 12:06:15 -05:00
f128-compare.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
f128-conv.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
f128-fma.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
f128-passByValue.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
f128-rounding.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
f128-truncateNconv.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
f128-vecExtractNconv.ll
…
fabs.ll
…
fast-isel-binary.ll
…
fast-isel-br-const.ll
…
fast-isel-branch.ll
…
fast-isel-call.ll
…
fast-isel-cmp-imm.ll
…
fast-isel-const.ll
…
fast-isel-conversion-p5.ll
…
fast-isel-conversion.ll
…
fast-isel-crash.ll
…
fast-isel-ext.ll
…
fast-isel-fcmp-nan.ll
[PowerPC] Enable CR bits support for Power8 and above.
2022-05-02 12:06:15 -05:00
fast-isel-fold.ll
…
fast-isel-fpconv.ll
…
fast-isel-GEP-coalesce.ll
…
fast-isel-i64offset.ll
…
fast-isel-icmp-split.ll
…
fast-isel-indirectbr.ll
…
fast-isel-load-store-vsx.ll
…
fast-isel-load-store.ll
…
fast-isel-pcrel.ll
…
fast-isel-redefinition.ll
…
fast-isel-ret.ll
…
fast-isel-rsp.ll
…
fast-isel-shifter.ll
…
fastcc_stacksize.ll
…
fastisel-gep-promote-before-add.ll
…
fcpsgn.ll
…
fdiv-combine.ll
…
fdiv.ll
…
fixup-kill-dead-flag-crash.mir
…
float-asmprint.ll
…
float-load-store-pair.ll
…
float-logic-ops.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
float-to-int.ll
…
float-vector-gather.ll
[PowerPC][AIX] Allow VSX patterns to be 32-bit and 64-bit safe on P8+.
2022-05-27 10:34:17 -05:00
floatPSA.ll
…
flt-preinc.ll
…
fma-aggr-FMF.ll
…
fma-assoc.ll
PowerPC: Don't hoist float multiply + add to fused operation on SPE
2022-08-10 11:04:27 -04:00
fma-combine.ll
…
fma-ext.ll
…
fma-mutate-duplicate-vreg.ll
…
fma-mutate-register-constraint.ll
…
fma-mutate.ll
…
fma-negate.ll
…
fma-precision.ll
…
fma.ll
…
fmaxnum.ll
…
fmf-propagation.ll
[IR] Enable opaque pointers by default
2022-06-02 09:40:56 +02:00
fminnum.ll
[PowerPC] fix stack size allocated for float point argument
2022-08-06 08:38:52 -04:00
fnabs.ll
…
fneg.ll
…
fold_swtest_br.ll
…
fold-frame-offset-using-rr.mir
…
fold-li.ll
…
fold-remove-li.ll
…
fold-rlwinm-1.ll
…
fold-rlwinm.mir
…
fold-zero.ll
…
fp2int2fp-ppcfp128.ll
…
fp64-to-int16.ll
[PowerPC] Enable CR bits support for Power8 and above.
2022-05-02 12:06:15 -05:00
fp128-bitcast-after-operation.ll
…
fp128-libcalls.ll
…
fp_to_uint.ll
…
fp-branch.ll
…
fp-int128-fp-combine.ll
…
fp-int-conversions-direct-moves.ll
…
fp-int-fp.ll
…
fp-intrinsics-fptosi-legal.ll
…
fp-splat.ll
…
fp-strict-conv-f128.ll
…
fp-strict-conv-spe.ll
…
fp-strict-conv.ll
…
fp-strict-f128.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
fp-strict-fcmp-noopt.ll
[PowerPC] Enable CR bits support for Power8 and above.
2022-05-02 12:06:15 -05:00
fp-strict-fcmp-spe.ll
…
fp-strict-fcmp.ll
…
fp-strict-minmax.ll
…
fp-strict-round.ll
[PowerPC] Add missed VSX shuffles instead of Altivec ones
2022-03-14 10:11:54 -05:00
fp-strict.ll
…
fp-to-int-ext.ll
…
fp-to-int-to-fp.ll
[DAG] Enable ISD::SRL SimplifyMultipleUseDemandedBits handling inside SimplifyDemandedBits
2022-07-28 14:10:44 +01:00
fpcopy.ll
…
fpscr-intrinsics.ll
…
frame_index_scavenging.mir
…
frame-size.ll
…
frameaddr.ll
…
Frames-dyn-alloca-with-func-call.ll
…
Frames-dyn-alloca.ll
…
Frames-large.ll
…
Frames-leaf.ll
…
Frames-small.ll
…
Frames-stack-floor.ll
…
frem.ll
…
frounds.ll
…
fsel.ll
…
fsl-e500mc.ll
…
fsl-e5500.ll
…
fsqrt.ll
…
fsub-fneg.ll
…
ftrunc-legalize.ll
…
ftrunc-vec.ll
…
func-addr-consts.ll
…
func-addr.ll
…
func-alias.ll
…
funnel-shift-rot.ll
…
funnel-shift.ll
[SelectionDAG] Clear promoted bits before UREM on shift amount in PromoteIntRes_FunnelShift.
2022-05-06 09:26:30 -07:00
fusion-load-store.ll
…
future-check-features.ll
…
glob-comp-aa-crash.ll
…
global-address-non-got-indirect-access.ll
…
gnu-attribute.ll
…
gpr-vsr-spill.ll
…
handle-f16-storage-type.ll
…
hardware-loops-crash.ll
…
hello.ll
…
hidden-vis-2.ll
…
hidden-vis.ll
…
hoist-logic.ll
…
htm-ttest.ll
…
htm.ll
…
huge-frame-call.ll
[PowerPC] Support huge frame size for PPC64
2022-06-06 09:08:28 +00:00
huge-frame-size.ll
[PowerPC] Support huge frame size for PPC64
2022-06-06 09:08:28 +00:00
huge-frame-unsupported.ll
[PowerPC] Support huge frame size for PPC64
2022-06-06 09:08:28 +00:00
i1-ext-fold.ll
…
i1-to-double.ll
…
i32-to-float.ll
…
i64_fp_round.ll
…
i64_fp.ll
…
i64-to-float.ll
…
i128-and-beyond.ll
…
ia-mem-r0.ll
…
ia-neg-const.ll
…
iabs.ll
…
ifcvt_cr_field.ll
…
ifcvt-diamond-ret.mir
…
ifcvt-forked-bug-2016-08-08.ll
…
ifcvt.ll
…
ifcvt.mir
…
ifunc.ll
…
illegal-element-type.ll
…
in-asm-f64-reg.ll
…
inc-of-add.ll
…
indexed-load.ll
…
indirect-hidden.ll
…
indirectbr.ll
…
inline-asm-clobber-warning.ll
…
inline-asm-dollarpc.ll
…
inline-asm-i-constraint-i1.ll
…
inline-asm-label.ll
…
inline-asm-multilevel-gep.ll
…
inline-asm-physical-fpr-spe.ll
…
inline-asm-physical-fpr.ll
…
inline-asm-s-modifier.ll
…
inline-asm-scalar-to-vector-error.ll
…
inline-asm-vsx-clobbers.ll
…
inlineasm-copy.ll
…
inlineasm-extendedmne.ll
…
inlineasm-i64-reg.ll
…
inlineasm-output-template.ll
…
inlineasm-vsx-reg.ll
…
instr-properties.ll
…
instruction-mix-remarks-BCTRL_LWZinto_toc.ll
…
int128_ldst.ll
…
int-fp-conv-0.ll
…
int-fp-conv-1.ll
…
inverted-bool-compares.ll
…
is_fpclass.ll
[PowerPC] Support of ppc_fp128 in lowering of llvm.is_fpclass
2022-04-29 11:10:47 +07:00
isel-rc-nox0.ll
…
isel.ll
…
ispositive.ll
…
issue55983.ll
[PowerPC] Allow llvm.ppc.cfence to accept pointer types
2022-06-24 10:55:32 +08:00
isync.ll
…
itofp128.ll
…
jaggedstructs.ll
…
jump-tables-collapse-rotate-remove-SrcMI.mir
…
jump-tables-collapse-rotate.ll
…
kernel-fp-round.ll
…
knowCRBitSpill.ll
…
LargeAbsoluteAddr.ll
…
larger-than-red-zone.ll
…
lbz-from-ld-shift.ll
…
lbzux.ll
…
ld-bswap64-no-ldbrx.ll
…
ld-st-upd.ll
…
ldst-16-byte-asm.mir
…
ldst-16-byte.mir
…
ldst-align.ll
…
ldtoc-inv.ll
…
legalize-invert-br_cc.ll
…
legalize-vaarg.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
lha.ll
…
licm-remat.ll
…
licm-tocReg.ll
…
lit.local.cfg
…
livephysregs.mir
…
livevars-crash1.mir
…
livevars-crash2.mir
…
llrint-conv.ll
…
llround-conv.ll
…
load-and-splat.ll
[PowerPC] Improve getNormalLoadInput to reach more splat load
2022-06-28 08:02:49 -04:00
load-constant-addr.ll
…
load-rightmost-vector-elt.ll
…
load-shift-combine.ll
…
load-shuffle-and-shuffle-store.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
load-two-flts.ll
…
load-v4i8-improved.ll
[PowerPC][AIX] Allow VSX patterns to be 32-bit and 64-bit safe on P8+.
2022-05-27 10:34:17 -05:00
logic-ops-on-compares.ll
…
long-compare.ll
…
longcall.ll
…
longdbl-truncate.ll
…
longdouble-pack.ll
…
loop-align.ll
…
loop-comment.ll
…
loop-data-prefetch-inner.ll
…
loop-data-prefetch.ll
…
loop-hoist-toc-save.ll
…
loop-instr-form-prepare.ll
…
loop-instr-prep-non-const-increasement.ll
…
loop-p10-pair-prepare.ll
…
loop-prep-all.ll
…
lower-globaladdr32-aix-asm.ll
…
lower-globaladdr32-aix.ll
…
lower-globaladdr64-aix-asm.ll
…
lower-globaladdr64-aix.ll
…
lower-intrinsics-afn-mass_notail.ll
[PowerPC] Fix the none tail call in scalar MASS conversion
2022-03-08 08:59:17 -08:00
lower-intrinsics-afn-mass.ll
…
lower-intrinsics-fast-mass_notail.ll
[PowerPC] Fix the none tail call in scalar MASS conversion
2022-03-08 08:59:17 -08:00
lower-intrinsics-fast-mass.ll
…
lower-intrinsics-nofast-mass.ll
…
lower-massv-attr.ll
…
lower-massv.ll
…
lower-scalar-mass-afn.ll
…
lower-scalar-mass-fast.ll
…
lower-scalar-mass-nofast.ll
…
LQ-STQ-32bit-offset.ll
[PowerPC] Fix LQ-STQ instructions to use correct offset and base
2022-06-16 10:47:38 -05:00
LQ-STQ.ll
[PowerPC] Fix LQ-STQ instructions to use correct offset and base
2022-06-16 10:47:38 -05:00
lrint-conv.ll
…
lround-conv.ll
…
lsa.ll
…
lsr-ctrloop.ll
…
lsr-insns-cost.ll
…
lsr-postinc-pos.ll
…
lsr-profitable-chain.ll
…
lxv-aligned-stack-slots.ll
…
lxvw4x-bug.ll
…
machine-backward-cp.mir
…
machine-combiner.ll
…
machine-pre.ll
…
machinelicm-cse-dead-flag.mir
…
macro-fusion.ll
…
macro-fusion.mir
…
maddld.ll
…
mask64.ll
…
mature-mc-support.ll
…
mc-instrlat.ll
…
mcm-1.ll
…
mcm-2.ll
…
mcm-3.ll
…
mcm-4.ll
…
mcm-5.ll
…
mcm-6.ll
…
mcm-7.ll
…
mcm-8.ll
…
mcm-9.ll
…
mcm-10.ll
…
mcm-11.ll
…
mcm-12.ll
…
mcm-13.ll
…
mcm-default.ll
…
mcm-obj-2.ll
…
mcm-obj.ll
…
mcount-insertion.ll
[LegacyPM] Remove {,PostInline}EntryExitInstrumenterPass
2022-07-23 15:30:15 -07:00
MCSE-caller-preserved-reg.ll
…
mem_update.ll
…
mem-rr-addr-mode.ll
…
memcmp-mergeexpand.ll
…
memcmp.ll
…
memcmpIR.ll
…
memCmpUsedInZeroEqualityComparison.ll
…
memcpy_dereferenceable.ll
…
memcpy-vec.ll
…
memset-nc-le.ll
…
merge_stores_dereferenceable.ll
…
merge-st-chain-op.ll
…
MergeConsecutiveStores.ll
…
mftb.ll
…
mi-peephole-splat.ll
…
mi-peephole.mir
…
mi-peepholes-trap-opt.mir
…
mi-scheduling-lhs.ll
…
mi-simplify-code.mir
…
misched-inorder-latency.ll
…
misched.ll
…
mma-acc-memops.ll
[PowerPC][NFC] Convert the MMA test cases to use opaque pointers.
2022-07-22 11:43:40 -05:00
mma-acc-spill.ll
[PowerPC][NFC] Convert the MMA test cases to use opaque pointers.
2022-07-22 11:43:40 -05:00
mma-integer-based-outer-product.ll
[PowerPC][NFC] Convert the MMA test cases to use opaque pointers.
2022-07-22 11:43:40 -05:00
mma-intrinsics.ll
[PowerPC][NFC] Convert the MMA test cases to use opaque pointers.
2022-07-22 11:43:40 -05:00
mma-outer-product.ll
[PowerPC][NFC] Convert the MMA test cases to use opaque pointers.
2022-07-22 11:43:40 -05:00
mma-phi-accs.ll
[PowerPC][NFC] Convert the MMA test cases to use opaque pointers.
2022-07-22 11:43:40 -05:00
MMO-flags-assertion.ll
…
more-dq-form-prepare.ll
…
mtvsrc-mfvscr-PPCVSXSwapRemoval.ll
[PowerPC] Fix PPCVSXSwapRemoval pass to include MTVSCR and MFVSCR as not swappable.
2022-06-17 10:14:24 -05:00
mtvsrdd.ll
…
mul-const-i64.ll
…
mul-const-vector.ll
…
mul-const.ll
…
mul-high.ll
…
mul-with-overflow.ll
…
mulhs.ll
…
mulld.ll
…
mulli.ll
[PowerPC] Add an ISEL pattern for i32 MULLI.
2022-07-18 04:40:51 -04:00
mult-alt-generic-powerpc64.ll
…
mult-alt-generic-powerpc.ll
…
multi-return.ll
…
named-reg-alloc-r0.ll
…
named-reg-alloc-r1-64.ll
…
named-reg-alloc-r1.ll
…
named-reg-alloc-r2-64.ll
…
named-reg-alloc-r2.ll
…
named-reg-alloc-r13-64.ll
…
named-reg-alloc-r13.ll
…
neg-abs.ll
…
neg.ll
…
negate-i1.ll
…
negctr.ll
…
no-ctr-loop-if-exit-in-nested-loop.ll
…
no-dead-strip.ll
…
no-dup-of-bdnz.ll
…
no-dup-spill-fp.ll
…
no-duplicate.ll
…
no-ext-with-count-zeros.ll
…
no-extra-fp-conv-ldst.ll
…
no-pref-jumps.ll
…
no-rlwimi-trivial-commute.mir
…
NoCRFieldRedefWhenSpillingCRBIT.mir
…
nofpexcept.ll
[PowerPC] Re-run update_mir_test_checks.py on nofpexcept.ll. NFC
2022-05-04 16:17:14 -07:00
nomerge.ll
…
non-debug-mi-search-frspxsrsp.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
non-simple-args-intrin.ll
…
noPermuteFormasking.ll
…
not-fixed-frame-object.ll
…
novrsave.ll
…
O3-pipeline.ll
[PowerPC] add a new pass to expand ctr loop pseudos
2022-06-20 22:57:24 -04:00
opt-builtins-ppc-xlcompat-cas.ll
…
opt-cmp-inst-cr0-live.ll
…
opt-li-add-to-addi.ll
…
opt-sub-inst-cr0-live.mir
…
optcmp.ll
…
optimize-andiso.ll
…
optnone-crbits-i1-ret.ll
…
or-addressing-mode.ll
…
ori_imm32.ll
…
ori_imm64.ll
…
out-of-range-dform.ll
…
overflow-intrinsic-optimizations.ll
[PPCISelLowering] Avoid emitting calls to __multi3, __muloti4
2022-03-20 20:59:30 +01:00
p8-isel-sched.ll
…
p8-scalar_vector_conversions.ll
[PowerPC] Skip combine for vector_shuffles when two scalar_to_vector nodes are different vector types.
2022-06-15 14:12:18 -05:00
p8altivec-shuffles-pred.ll
[PowerPC] Disable perfect shuffle by default
2022-03-15 15:52:24 +08:00
p9_copy_fp.ll
…
p9-dform-load-alignment.ll
…
p9-vbpermd.ll
…
p9-vector-compares-and-counts.ll
…
p9-vector-sign-extend.ll
…
p9-vinsert-vextract.ll
…
p9-xxinsertw-xxextractuw.ll
…
p10-bit-manip-ops.ll
…
p10-constants.ll
…
p10-fi-elim.ll
…
p10-handle-split-promote-vec.ll
[DAGCombine] Hoist shifts out of a logic operations tree.
2022-08-12 12:42:16 +03:00
p10-setbc-ri.ll
…
p10-setbc-rr.ll
…
p10-setbcr-ri.ll
…
p10-setbcr-rr.ll
…
p10-setboolean-ext-fp.ll
…
p10-setnbc-ri.ll
…
p10-setnbc-rr.ll
…
p10-setnbcr-ri.ll
…
p10-setnbcr-rr.ll
…
p10-spill-creq.ll
…
p10-spill-crgt.ll
…
p10-spill-crlt.ll
…
p10-spill-crun.ll
…
p10-splatImm32.ll
…
p10-splatImm-CPload-pcrel.ll
…
p10-splatImm.ll
…
p10-string-ops.ll
…
p10-vector-divide.ll
enable P10 vector builtins test on AIX 64 bit; NFC
2022-07-21 04:23:02 -04:00
p10-vector-mask-ops.ll
enable P10 vector builtins test on AIX 64 bit; NFC
2022-07-21 04:23:02 -04:00
p10-vector-modulo.ll
enable P10 vector builtins test on AIX 64 bit; NFC
2022-07-21 04:23:02 -04:00
p10-vector-multiply.ll
enable P10 vector builtins test on AIX 64 bit; NFC
2022-07-21 04:23:02 -04:00
p10-vector-rotate.ll
…
p10-vector-shift.ll
…
p10-vector-sign-extend.ll
enable P10 vector builtins test on AIX 64 bit; NFC
2022-07-21 04:23:02 -04:00
p10-vsx-pcv.ll
…
P10-stack-alignment.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
paired-vector-intrinsics.ll
…
pcrel_ldst.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
pcrel-block-address.ll
…
pcrel-byte-loads.ll
[PowerPC] Enable CR bits support for Power8 and above.
2022-05-02 12:06:15 -05:00
pcrel-call-linkage-leaf.ll
…
pcrel-call-linkage-simple.ll
…
pcrel-call-linkage-with-calls.ll
…
pcrel-got-indirect.ll
…
pcrel-indirect-call.ll
…
pcrel-jump-table.ll
…
pcrel-linkeropt-option.ll
…
pcrel-linkeropt.ll
…
pcrel-local-caller-toc.ll
…
pcrel-relocation-plus-offset.ll
…
pcrel-tail-calls.ll
…
pcrel-tls_get_addr_clobbers.ll
…
pcrel-tls-general-dynamic.ll
…
pcrel-tls-initial-exec.ll
…
pcrel-tls-local-dynamic.ll
…
pcrel-tls-local-exec.ll
…
pcrel.ll
…
peephole-align.ll
…
peephole-cmp-eq.mir
…
peephole-miscompile-extswsli.mir
…
peephole-phi-acc.mir
…
peephole-subreg-def.mir
…
perfect-shuffle.ll
[PowerPC] Disable perfect shuffle by default
2022-03-15 15:52:24 +08:00
pgo-ref-directive.ll
…
phi-eliminate.mir
…
pie.ll
…
pip-inner.ll
…
popcnt-zext.ll
[TargetLowering] Expand the last stage of i16 popcnt using shift+add+and instead of mul+shift.
2022-05-16 09:27:44 -07:00
popcnt.ll
…
popcount.ll
…
post-ra-ec.ll
…
pow_massv_075_025exp.ll
…
pow-025-075-intrinsic-scalar-mass-afn.ll
…
pow-025-075-intrinsic-scalar-mass-fast.ll
…
pow-025-075-nointrinsic-scalar-mass-fast.ll
…
pow.75.ll
Revert "[CodeGen] Place SDNode debug ID declaration under appropriate #if"
2022-04-06 20:32:53 +03:00
power9-moves-and-splats.ll
…
powf_massv_075_025exp.ll
…
ppc32-align-long-double-sf.ll
…
ppc32-constant-BE-ppcf128.ll
…
ppc32-cyclecounter.ll
…
ppc32-i1-stack-arguments-abi-bug.ll
…
ppc32-i1-vaarg.ll
…
ppc32-i64-to-float-conv.ll
…
ppc32-lshrti3.ll
…
ppc32-nest.ll
…
ppc32-pic-large.ll
…
ppc32-pic.ll
…
ppc32-secure-plt-tls2.ll
…
ppc32-secure-plt-tls.ll
…
ppc32-selectcc-i64.ll
…
ppc32-skip-regs.ll
…
ppc32-vacopy.ll
…
ppc64-32bit-addic.ll
…
ppc64-abi-extend.ll
…
ppc64-acc-regalloc-bugfix.ll
…
ppc64-acc-regalloc.ll
…
ppc64-align-long-double.ll
…
ppc64-altivec-abi.ll
…
ppc64-anyregcc-crash.ll
Migrate llvm.experimental.patchpoint() to ptr.
2022-08-10 13:18:02 +01:00
ppc64-anyregcc.ll
Migrate llvm.experimental.patchpoint() to ptr.
2022-08-10 13:18:02 +01:00
ppc64-blnop.ll
…
ppc64-byval-align.ll
…
ppc64-byval-larger-struct.ll
[PowerPC] Fix lowering of byval parameters for sizes greater than 8 bytes.
2022-03-31 15:12:46 -05:00
ppc64-byval-multi-store.ll
…
ppc64-calls.ll
…
ppc64-crash.ll
…
ppc64-crsave.mir
…
ppc64-cyclecounter.ll
…
ppc64-elf-abi.ll
…
ppc64-fastcc-fast-isel.ll
…
ppc64-fastcc.ll
…
ppc64-func-desc-hoist.ll
…
ppc64-gep-opt.ll
…
ppc64-get-cache-line-size.ll
[TargetTransformInfo] Added an opt/llc option for cache line size
2022-06-16 15:57:51 -04:00
ppc64-i128-abi.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
ppc64-icbt-pwr7.ll
…
ppc64-icbt-pwr8.ll
…
ppc64-inlineasm-clobber.ll
[SelectionDAG] make INLINEASM_BR use MachineBasicBlocks instead of BlockAddresses
2022-08-17 09:34:31 -07:00
ppc64-linux-func-size.ll
…
ppc64-nest.ll
…
ppc64-nonfunc-calls.ll
…
ppc64-notoc-rm-relocation.ll
[PowerPC] The BL8_NOTOC_RM instruction needs to produce a notoc relocation.
2022-03-23 19:01:05 -05:00
ppc64-P9-mod.ll
…
ppc64-P9-setb.ll
…
ppc64-P9-vabsd.ll
[PowerPC] Add missed VSX shuffles instead of Altivec ones
2022-03-14 10:11:54 -05:00
ppc64-patchpoint.ll
Migrate llvm.experimental.patchpoint() to ptr.
2022-08-10 13:18:02 +01:00
ppc64-pre-inc-no-extra-phi.ll
…
ppc64-prefetch.ll
…
ppc64-r2-alloc.ll
…
ppc64-rop-protection-aix.ll
[PowerPC] Support huge frame size for PPC64
2022-06-06 09:08:28 +00:00
ppc64-rop-protection.ll
[PowerPC] Support huge frame size for PPC64
2022-06-06 09:08:28 +00:00
ppc64-sibcall-shrinkwrap.ll
…
ppc64-sibcall.ll
…
ppc64-smallarg.ll
…
ppc64-stackmap-nops.ll
…
ppc64-stackmap.ll
Migrate llvm.experimental.patchpoint() to ptr.
2022-08-10 13:18:02 +01:00
ppc64-toc.ll
…
ppc64-vaarg-int.ll
…
ppc64-varargs.ll
…
ppc64-xxsplti32dx-pattern-check.ll
…
ppc64-zext.ll
…
ppc64le-aggregates.ll
…
ppc64le-calls.ll
…
ppc64le-crsave.ll
…
ppc64le-localentry-large.ll
…
ppc64le-localentry.ll
…
ppc64le-smallarg.ll
…
ppc440-fp-basic.ll
…
ppc440-msync.ll
…
ppc_fp128-bcwriter.ll
…
ppc-32bit-build-vector.ll
[PowerPC] Disable perfect shuffle by default
2022-03-15 15:52:24 +08:00
ppc-32bit-shift.ll
…
ppc-crbits-onoff.ll
…
ppc-ctr-dead-code.ll
…
ppc-disable-non-volatile-cr.ll
…
ppc-empty-fs.ll
…
ppc-label2.ll
…
ppc-label.ll
…
ppc-partword-atomic.ll
…
ppc-passname-assert.ll
…
ppc-passname.ll
…
ppc-prologue.ll
…
ppc-redzone-alignment-bug.ll
…
ppc-shrink-wrapping.ll
…
ppc-shufflevector-combine.ll
[PowerPC] Fix combine step for shufflevector.
2022-06-14 11:31:24 -05:00
ppc-vaarg-agg.ll
…
ppcf128-1-opt.ll
…
ppcf128-1.ll
…
ppcf128-2.ll
…
ppcf128-3.ll
…
ppcf128-4.ll
…
ppcf128-constrained-fp-intrinsics.ll
…
ppcf128-endian.ll
…
ppcf128-freeze.mir
…
ppcf128sf.ll
…
ppcsoftops.ll
…
pr3711_widen_bit.ll
…
pr12757.ll
…
pr13641.ll
…
pr13891.ll
…
pr15031.ll
…
pr15359.ll
…
pr15630.ll
…
pr15632.ll
…
pr16556-2.ll
…
pr16556.ll
…
pr16573.ll
…
pr17168.ll
…
pr17354.ll
…
pr18663-2.ll
…
pr18663.ll
…
pr20442.ll
…
pr22711.ll
…
pr24216.ll
…
pr24546.ll
…
pr24636.ll
…
pr25080.ll
[DAG] PromoteIntRes_BUILD_VECTOR - extend constant boolean vectors according to target BooleanContents
2022-07-20 10:49:31 +01:00
pr25157-peephole.ll
…
pr25157.ll
…
pr26180.ll
…
pr26193.ll
…
pr26356.ll
…
pr26378.ll
…
pr26381.ll
…
pr26617.ll
…
pr26690.ll
…
pr27078.ll
[DAG]Introduce llvm::processShuffleMasks and use it for shuffles in DAG Type Legalizer.
2022-04-20 09:37:16 -07:00
pr27350.ll
…
pr28130.ll
…
pr28630.ll
…
pr30451.ll
…
pr30640.ll
…
pr30663.ll
…
pr30715.ll
…
pr31144.ll
…
pr32063.ll
…
pr32140.ll
…
pr33093.ll
…
pr33547.ll
…
pr35402.ll
[PowerPC] Regenerate pr35402.ll test checks
2022-07-13 11:01:44 +01:00
pr35688.ll
…
pr36068.ll
…
pr36292.ll
…
pr38087.ll
…
pr38899-split-register-at-spill.mir
…
pr39478.ll
…
pr39815.ll
…
pr40922.ll
…
pr41088.ll
…
pr41177.ll
…
pr42492.ll
…
pr43527.ll
…
pr43976.ll
…
pr44183.ll
…
pr44239.ll
…
pr45186.ll
…
pr45297.ll
…
pr45301.ll
…
pr45432.ll
…
pr45448.ll
…
pr45628.ll
…
pr45709.ll
…
pr46759.ll
…
pr46923.ll
…
pr47373.ll
…
pr47660.ll
…
pr47707.ll
…
pr47830.ll
…
pr47891.ll
…
pr47916.ll
[PowerPC] Add missed VSX shuffles instead of Altivec ones
2022-03-14 10:11:54 -05:00
pr48388.ll
…
pr48519.ll
…
pr48527.ll
…
pr49092.ll
…
pr49509.ll
…
pr55463.ll
PowerPC: Don't hoist float multiply + add to fused operation on SPE
2022-08-10 11:04:27 -04:00
pr55857.ll
[PowerPC] Don't use the S30 and S31 regs for the pic code
2022-08-10 10:31:27 -05:00
pr55911.ll
[PowerPC] Change long to int64_t (which is always 64 bit or 8 bytes )
2022-07-27 09:34:45 -07:00
pr56469.ll
[PowerPC] fix stack size allocated for float point argument
2022-08-06 08:38:52 -04:00
PR3488.ll
…
PR33636.ll
[PowerPC] Simplify test for PR33636 (NFC)
2022-07-06 09:47:42 +02:00
PR33671.ll
…
PR35812-neg-cmpxchg.ll
…
pre-inc-disable.ll
[DAG] visitINSERT_VECTOR_ELT - fold insert_vector_elt(scalar_to_vector(x),v,i) -> build_vector()
2022-06-11 15:29:22 +01:00
prefer-dqform.ll
…
preinc-ld-sel-crash.ll
…
preincprep-i64-check.ll
…
preincprep-invoke.ll
…
preincprep-nontrans-crash.ll
…
private.ll
…
prolog_vec_spills.mir
…
pwr3-6x.ll
…
pwr7-gt-nop.ll
…
pzero-fp-xored.ll
[NFC] Autogenerate CodeGen/PowerPC/pzero-fp-xored.ll
2022-07-28 16:18:43 +00:00
quadint-return.ll
…
r31.ll
…
read-set-flm.ll
…
recipest.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
reduce_cr.ll
…
reduce_scalarization02.ll
…
reduce_scalarization.ll
[DAG] visitINSERT_VECTOR_ELT - fold insert_vector_elt(scalar_to_vector(x),v,i) -> build_vector()
2022-06-11 15:29:22 +01:00
redundant-copy-after-tail-dup.ll
…
reg_copy.mir
…
reg-coalesce-simple.ll
…
reg-names.ll
…
reg-scavenging.ll
…
register-pressure-reduction.ll
…
reloc-align.ll
…
remap-crash.ll
…
remat-imm.ll
…
rematerializable-instruction-machine-licm.ll
…
remove-copy-crunsetcrbit.mir
…
remove-implicit-use.mir
…
remove-redundant-li-implicit-reg.mir
…
remove-redundant-li-skip-imp-kill.mir
…
remove-redundant-load-imm.ll
…
remove-redundant-load-imm.mir
…
remove-redundant-moves.ll
…
remove-redundant-toc-saves.ll
…
remove-self-copies.mir
…
repeated-fp-divisors.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
resolvefi-basereg.ll
…
resolvefi-disp.ll
…
respect-rounding-mode.ll
…
restore-r30.ll
…
retaddr2.ll
…
retaddr_multi_levels.ll
…
retaddr.ll
…
return-val-i128.ll
…
rlwimi2.ll
…
rlwimi3.ll
…
rlwimi-and-or-bits.ll
…
rlwimi-and.ll
…
rlwimi-commute.ll
…
rlwimi-dyn-and.ll
…
rlwimi-keep-rsh.ll
…
rlwimi.ll
…
rlwinm2.ll
…
rlwinm_rldicl_to_andi.mir
…
rlwinm-zero-ext.ll
…
rlwinm.ll
…
rm-zext.ll
…
rotl-2.ll
…
rotl-64.ll
…
rotl-rotr-crash.ll
…
rotl.ll
…
rounding-ops.ll
…
rounding-rm-flag.ll
…
rs-undef-use.ll
…
s000-alias-misched.ll
…
sat-add.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
sat-register-clobber.ll
…
saturating-intrinsics.ll
…
save-bp.ll
…
save-cr-ppc32svr4.ll
…
save-crbp-ppc32svr4.ll
…
scalar_cmp.ll
…
scalar_vector_test_1.ll
…
scalar_vector_test_2.ll
…
scalar_vector_test_3.ll
…
scalar_vector_test_4.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
scalar_vector_test_5.ll
…
scalar-double-ldst.ll
…
scalar-equal.ll
…
scalar-float-ldst.ll
…
scalar-i8-ldst.ll
…
scalar-i16-ldst.ll
…
scalar-i32-ldst.ll
…
scalar-i64-ldst.ll
…
scalar-min-max-p10.ll
…
scalar-min-max.ll
…
scalar-rounding-ops.ll
…
scalars-in-altivec-regs.ll
…
scavenging.mir
…
sched-addi.ll
…
schedule-addi-load.mir
…
scheduling-mem-dependency.ll
…
sdag-ppcf128.ll
…
sdiv-pow2.ll
…
sections.ll
…
select_const.ll
[SDAG] try to replace subtract-from-constant with xor
2022-07-08 08:14:24 -04:00
select_lt0.ll
…
select-addrRegRegOnly.ll
…
select-cc.ll
…
select-constant-xor.ll
…
select-i1-vs-i1.ll
…
select-to-branch.mir
…
select.ll
…
selectiondag-extload-computeknownbits.ll
…
selectiondag-sextload.ll
…
set0-v8i16.ll
…
setcc_no_zext.ll
…
setcc-logic.ll
…
setcc-sub-flag.ll
…
setcc-to-sub.ll
…
setcc-vector.ll
…
setcclike-or-comb.ll
…
setcr_bc2.mir
…
setcr_bc3.mir
…
setcr_bc.mir
…
seteq-0.ll
…
setrnd.ll
…
sext-vector-inreg.ll
…
sh-overflow.mir
…
shift128.ll
…
shift_mask.ll
…
shift-cmp.ll
…
shl_elim.ll
…
shl_sext.ll
…
shrink-wrap.ll
…
shrink-wrap.mir
…
sign_ext_inreg1.ll
…
sign-ext-atomics.ll
…
signbit-shift.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
simplifyConstCmpToISEL.ll
…
sink-down-more-instructions-1.mir
…
sink-down-more-instructions-regpressure-high.mir
…
sink-side-effect.ll
…
sj-ctr-loop.ll
…
sjlj_no0x.ll
…
sjlj.ll
…
small-arguments.ll
…
sms-cpy-1.ll
…
sms-grp-order.ll
…
sms-iterator.ll
…
sms-large-stages.mir
[MachinePipeliner] Fix Phi generation failure for large stages
2022-08-09 13:14:26 +09:00
sms-phi-1.ll
…
sms-phi-2.ll
…
sms-phi-3.ll
…
sms-phi-5.ll
…
sms-phi.ll
[PowerPC] mapping hardward loop intrinsics to powerpc pseudo
2022-08-08 21:34:20 -04:00
sms-remark.ll
…
sms-simple.ll
…
smulfixsat.ll
…
spe-fastmath.ll
…
spe-hwdouble.ll
…
spe.ll
[PowerPC] Don't use the S30 and S31 regs for the pic code
2022-08-10 10:31:27 -05:00
spill_p9_setb.ll
…
spill-nor0.ll
…
spill-nor0.mir
…
spill-vec-pair.ll
[PowerPC] Disable automatic generation of STXVP
2022-06-20 14:30:29 -05:00
splat-bug.ll
…
splat-larger-types-as-v16i8.ll
…
split-index-tc.ll
…
splitstore-check-volatile.ll
…
srem-lkk.ll
…
srem-seteq-illegal-types.ll
[ValueTypes] Define MVTs for v128i2/v64i4 as well as i2 and i4.
2022-06-02 00:49:11 +00:00
srem-vector-lkk.ll
[PowerPC] Add missed VSX shuffles instead of Altivec ones
2022-03-14 10:11:54 -05:00
srl-mask.ll
…
stack_pointer_vec_spills.mir
…
stack-clash-dynamic-alloca.ll
…
stack-clash-prologue-nounwind.ll
…
stack-clash-prologue.ll
…
stack-coloring-vararg.mir
[MIRParser] Diagnose too large align values in MachineMemOperands
2022-02-24 15:32:08 +00:00
stack-guard-oob.ll
…
stack-guard-reassign.ll
…
stack-no-redzone.ll
…
stack-protector.ll
…
stack-realign.ll
…
stack-restore-with-setjmp.ll
…
stackmap-frame-setup.ll
…
stacksize.ll
…
std-unal-fi.ll
…
stdux-constuse.ll
…
stfiwx-2.ll
…
stfiwx.ll
…
store_fptoi.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
store-combine.ll
…
store-constant.ll
…
store-forward-be32.ll
[DAGCombiner] Add some BE store forwarding tests; NFC
2022-08-08 16:33:01 -04:00
store-forward-be64.ll
[DAGCombiner] Add some BE store forwarding tests; NFC
2022-08-08 16:33:01 -04:00
store-load-fwd.ll
…
store-rightmost-vector-elt.ll
…
store-update.ll
…
structsinmem.ll
…
structsinregs.ll
…
stubs.ll
…
stwu8.ll
…
stwu-gta.ll
…
stwu-sched.ll
…
stwux.ll
…
sub-bv-types.ll
…
sub-of-not.ll
…
subc.ll
…
subreg-killed.mir
…
subreg-postra-2.ll
…
subreg-postra.ll
…
subtract_from_imm.ll
…
svr4-redzone.ll
…
swap-reduction.ll
…
swaps-le-1.ll
…
swaps-le-2.ll
…
swaps-le-3.ll
…
swaps-le-4.ll
…
swaps-le-5.ll
…
swaps-le-6.ll
…
swaps-le-7.ll
…
swaps-le-8.ll
…
tail-dup-analyzable-fallthrough.ll
…
tail-dup-branch-to-fallthrough.ll
…
tail-dup-break-cfg.ll
…
tail-dup-layout.ll
…
tailcall1-64.ll
…
tailcall1.ll
…
tailcall-speculatable-callee.ll
…
tailcall-string-rvo.ll
…
tailcallpic1.ll
…
test_call_aix.ll
…
test_func_desc.ll
[XCOFF] change default program code csect alignment to 32
2022-06-29 04:16:01 +00:00
test-and-cmp-folding.ll
…
test-vector-insert.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
testBitReverse.ll
…
testComparesi32gtu.ll
…
testComparesi32leu.ll
…
testComparesi32ltu.ll
…
testComparesieqsc.ll
…
testComparesieqsi.ll
…
testComparesieqsll.ll
…
testComparesieqss.ll
…
testComparesiequc.ll
…
testComparesiequi.ll
…
testComparesiequll.ll
…
testComparesiequs.ll
…
testComparesigesc.ll
…
testComparesigesi.ll
…
testComparesigesll.ll
…
testComparesigess.ll
…
testComparesigeuc.ll
…
testComparesigeui.ll
…
testComparesigeull.ll
…
testComparesigeus.ll
…
testComparesigtsc.ll
…
testComparesigtsi.ll
…
testComparesigtsll.ll
…
testComparesigtss.ll
…
testComparesigtuc.ll
…
testComparesigtui.ll
…
testComparesigtus.ll
…
testComparesilesc.ll
…
testComparesilesi.ll
…
testComparesilesll.ll
…
testComparesiless.ll
…
testComparesileuc.ll
…
testComparesileui.ll
…
testComparesileull.ll
…
testComparesileus.ll
…
testComparesiltsc.ll
…
testComparesiltsi.ll
…
testComparesiltsll.ll
…
testComparesiltss.ll
…
testComparesiltuc.ll
…
testComparesiltui.ll
…
testComparesiltus.ll
…
testComparesinesc.ll
…
testComparesinesi.ll
…
testComparesinesll.ll
…
testComparesiness.ll
…
testComparesineuc.ll
…
testComparesineui.ll
…
testComparesineull.ll
…
testComparesineus.ll
…
testCompareslleqsc.ll
…
testCompareslleqsi.ll
…
testCompareslleqsll.ll
…
testCompareslleqss.ll
…
testComparesllequc.ll
…
testComparesllequi.ll
…
testComparesllequll.ll
…
testComparesllequs.ll
…
testComparesllgesc.ll
…
testComparesllgesi.ll
…
testComparesllgesll.ll
…
testComparesllgess.ll
…
testComparesllgeuc.ll
…
testComparesllgeui.ll
…
testComparesllgeull.ll
…
testComparesllgeus.ll
…
testComparesllgtsll.ll
…
testComparesllgtuc.ll
…
testComparesllgtui.ll
…
testComparesllgtus.ll
…
testCompareslllesc.ll
…
testCompareslllesi.ll
…
testCompareslllesll.ll
…
testComparesllless.ll
…
testComparesllleuc.ll
…
testComparesllleui.ll
…
testComparesllleull.ll
…
testComparesllleus.ll
…
testComparesllltsll.ll
…
testComparesllltuc.ll
…
testComparesllltui.ll
…
testComparesllltus.ll
…
testComparesllnesll.ll
…
testComparesllneull.ll
…
thread-pointer.ll
…
tls_get_addr_clobbers.ll
…
tls_get_addr_fence1.mir
…
tls_get_addr_fence2.mir
…
tls_get_addr_stackframe.ll
…
tls-crash.mir
[PowerPC] PPCTLSDynamicCall does not preserve LiveIntervals
2022-07-05 20:09:42 +01:00
tls-cse.ll
…
tls-debug-aix.ll
[PowerPC] omit location attribute for TLS variable on AIX
2022-08-12 00:54:48 -04:00
tls-pic.ll
…
tls-pie-xform.ll
…
tls-store2.ll
…
tls.ll
…
toc-data-const.ll
…
toc-data.ll
…
toc-float.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
toc-load-sched-bug.ll
…
tocSaveInPrologue.ll
…
topdepthreduce-postra.mir
…
trampoline.ll
…
trunc-srl-load.ll
…
two-address-crash.mir
…
uint-to-fp-v4i32.ll
…
uint-to-ppcfp128-crash.ll
…
umulfixsat.ll
…
umulo-128-legalisation-lowering.ll
[PPCISelLowering] Avoid emitting calls to __multi3, __muloti4
2022-03-20 20:59:30 +01:00
unal4-std.ll
…
unal-altivec2.ll
…
unal-altivec-wint.ll
…
unal-altivec.ll
…
unal-vec-ldst.ll
…
unal-vec-negarith.ll
…
unaligned-addressing-mode.ll
…
unaligned-dqform-ld.ll
…
unaligned-floats.ll
…
unaligned.ll
…
unreachable-mbb-jtreference-elimination.ll
…
unsafe-math.ll
…
unwind-dw2-g.ll
…
unwind-dw2.ll
…
urem-lkk.ll
…
urem-seteq-illegal-types.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
urem-vector-lkk.ll
[PowerPC] Add missed VSX shuffles instead of Altivec ones
2022-03-14 10:11:54 -05:00
use-cr-result-of-dom-icmp-st.ll
…
uwtables.ll
…
v2i64_scalar_to_vector_shuffle.ll
[PowerPC][NFC] Add additional vector_shuffle tests involving scalar_to_vector.
2022-08-15 12:30:58 -05:00
v4i32_scalar_to_vector_shuffle.ll
[PowerPC][NFC] Add additional vector_shuffle tests involving scalar_to_vector.
2022-08-15 12:30:58 -05:00
v8i16_scalar_to_vector_shuffle.ll
[PowerPC][NFC] Add additional vector_shuffle tests involving scalar_to_vector.
2022-08-15 12:30:58 -05:00
v16i8_scalar_to_vector_shuffle.ll
[PowerPC][NFC] Add additional vector_shuffle tests involving scalar_to_vector.
2022-08-15 12:30:58 -05:00
vaddsplat.ll
…
varargs-struct-float.ll
…
varargs.ll
…
variable_elem_vec_extracts.ll
…
vavg.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vcmp-fold.ll
…
vec_abs.ll
…
vec_absd.ll
…
vec_add_sub_doubleword.ll
…
vec_add_sub_quadword.ll
…
vec_auto_constant.ll
…
vec_br_cmp.ll
…
vec_buildvector_loadstore.ll
…
vec_call.ll
…
vec_clz.ll
…
vec_cmp.ll
…
vec_cmpd_p7.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec_cmpd.ll
…
vec_cmpq.ll
…
vec_constants.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec_conv_fp32_to_i8_elts.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec_conv_fp32_to_i16_elts.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec_conv_fp32_to_i64_elts.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec_conv_fp64_to_i8_elts.ll
[PowerPC] Add missed VSX shuffles instead of Altivec ones
2022-03-14 10:11:54 -05:00
vec_conv_fp64_to_i16_elts.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec_conv_fp64_to_i32_elts.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec_conv_fp_to_i_4byte_elts.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec_conv_fp_to_i_8byte_elts.ll
…
vec_conv_i8_to_fp32_elts.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec_conv_i8_to_fp64_elts.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec_conv_i16_to_fp32_elts.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec_conv_i16_to_fp64_elts.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec_conv_i32_to_fp64_elts.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec_conv_i64_to_fp32_elts.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec_conv_i_to_fp_4byte_elts.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec_conv_i_to_fp_8byte_elts.ll
…
vec_conv.ll
…
vec_extload.ll
…
vec_extract_p9_2.ll
…
vec_extract_p9.ll
[PowerPC] Disable perfect shuffle by default
2022-03-15 15:52:24 +08:00
vec_fmuladd.ll
…
vec_fneg.ll
…
vec_insert_elt.ll
[PowerPC][AIX] Allow VSX patterns to be 32-bit and 64-bit safe on P8+.
2022-05-27 10:34:17 -05:00
vec_insert.ll
…
vec_int_ext.ll
[PowerPC] Add missed VSX shuffles instead of Altivec ones
2022-03-14 10:11:54 -05:00
vec_int_to_double_shuffle.ll
…
vec_mergeow.ll
…
vec_minmax.ll
…
vec_misaligned.ll
…
vec_mul_even_odd.ll
…
vec_mul.ll
…
vec_perf_shuffle.ll
[PowerPC] Disable perfect shuffle by default
2022-03-15 15:52:24 +08:00
vec_popcnt.ll
…
vec_revb.ll
…
vec_rotate_shift.ll
…
vec_rounding.ll
…
vec_select.ll
…
vec_shift.ll
…
vec_shuffle_le.ll
…
vec_shuffle_p8vector_le.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec_shuffle_p8vector.ll
[PowerPC] Disable perfect shuffle by default
2022-03-15 15:52:24 +08:00
vec_shuffle.ll
…
vec_sldwi.ll
…
vec_splat_constant.ll
…
vec_splat.ll
…
vec_sqrt.ll
…
vec_urem_const.ll
…
vec_veqv_vnand_vorc.ll
…
vec_vrsave.ll
…
vec_xxpermdi.ll
…
vec_zero.ll
…
vec-abi-align.ll
…
vec-asm-disabled.ll
…
vec-bswap.ll
…
vec-extract-itofp.ll
…
vec-icmpeq-v2i64-p7.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec-itofp.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec-min-max.ll
…
vec-select.ll
[DAG] PromoteIntRes_BUILD_VECTOR - extend constant boolean vectors according to target BooleanContents
2022-07-20 10:49:31 +01:00
vec-trunc2.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vec-trunc.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vector-constrained-fp-intrinsics.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vector-copysign.ll
…
vector-extend-sign.ll
…
vector-identity-shuffle.ll
…
vector-ldst.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vector-merge-store-fp-constants.ll
…
vector-popcnt-128-ult-ugt.ll
…
vector-reduce-add.ll
…
vector-reduce-and.ll
…
vector-reduce-fadd.ll
…
vector-reduce-fmax.ll
…
vector-reduce-fmin.ll
…
vector-reduce-fmul.ll
…
vector-reduce-mul.ll
…
vector-reduce-or.ll
[PowerPC] Fix test case changed by "Add XXEVAL TD pattern" [NFC]
2022-08-12 02:56:54 -04:00
vector-reduce-smax.ll
…
vector-reduce-smin.ll
…
vector-reduce-umax.ll
…
vector-reduce-umin.ll
…
vector-reduce-xor.ll
[PowerPC] Fix test case changed by "Add XXEVAL TD pattern" [NFC]
2022-08-12 02:56:54 -04:00
vector-rotates.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vector-rounding-ops.ll
…
vector.ll
…
vmladduhm.ll
…
vperm-instcombine.ll
…
vperm-lowering.ll
…
vrsave-inline-asm.ll
…
vrspill.ll
…
vsel-prom.ll
…
vselect-constants.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vsx_builtins.ll
…
vsx_insert_extract_le.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vsx_scalar_ld_st.ll
…
vsx_shuffle_le.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vsx-args.ll
…
VSX-DForm-Scalars.ll
…
vsx-div.ll
…
vsx-elementary-arith.ll
…
vsx-fma-m.ll
…
vsx-fma-mutate-trivial-copy.ll
…
vsx-fma-mutate-undef.ll
…
vsx-fma-sp.ll
…
vsx-infl-copy1.ll
…
vsx-infl-copy2.ll
…
vsx-ldst-builtin-le.ll
…
vsx-ldst.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vsx-minmax.ll
…
vsx-p8.ll
…
vsx-p9.ll
…
vsx-partword-int-loads-and-stores.ll
…
vsx-recip-est.ll
…
vsx-self-copy.ll
…
vsx-shuffle-le-load.ll
…
vsx-shuffle-le-multiple-uses.ll
…
vsx-spill-norwstore.ll
…
vsx-spill.ll
…
vsx-vec-spill.ll
…
vsx-word-splats.ll
…
VSX-XForm-Scalars.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vsx.ll
[PowerPC] emit VSX instructions instead of VMX instructions for vector loads and stores
2022-06-15 12:06:04 -05:00
vsxD-Form-spills.ll
…
vtable-reloc.ll
…
wa-asm-fpr.ll
…
weak_def_can_be_hidden.ll
…
xray-attribute-instrumentation.ll
…
xray-conditional-return.ll
…
xray-ret-is-terminator.ll
…
xray-tail-call-hidden.ll
…
xray-tail-call-sled.ll
…
xvcmpeqdp-v2f64.ll
…
xxeval-and-nand.ll
…
xxeval-eqv-nor-or-xor.ll
[PowerPC] Add XXEVAL TD pattern
2022-08-12 01:27:24 -04:00
xxleqv_xxlnand_xxlorc.ll
…
xxpermdi_mnemonics.s
…
zero-not-run.ll
…
zext-and-cmp.ll
…
zext-bitperm.ll
…
zext-free.ll
…