Files
clang-p2996/llvm/test/CodeGen/X86
Simon Pilgrim aeb3c772d3 [X86] Add shift by splat modulo amount vector tests
Shows failure to fold zero_extend_vector_inreg(and(x, c)) -> bitcast(and(x,c')) when we're only demanding the 0'th extended element, such as with the SSE variable shift ops.
2021-11-16 20:46:17 +00:00
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